drm/i915: Enable SDP split for DP2.0
authorVinod Govindapillai <vinod.govindapillai@intel.com>
Mon, 21 Nov 2022 15:07:18 +0000 (17:07 +0200)
committerJani Nikula <jani.nikula@intel.com>
Tue, 22 Nov 2022 09:28:57 +0000 (11:28 +0200)
Enable the SDP split configuration for DP2.0.

v2: Move the register handling out of compute config function (JaniN)

v3: Patch styling and register access based on platform support (JaniN)

v4: Rebased

v5: Use unconditional clear bit in intel_de_rmw (Jani Nikula)

Bspec: 67768
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221121150718.1117628-1-vinod.govindapillai@intel.com
drivers/gpu/drm/i915/display/intel_audio.c
drivers/gpu/drm/i915/display/intel_audio.h
drivers/gpu/drm/i915/display/intel_ddi.c
drivers/gpu/drm/i915/display/intel_display_types.h
drivers/gpu/drm/i915/display/intel_dp.c

index 98c3322b4549f84ccddd826e07d6b7504e1d9bee..626c47e96a6d227df6c55cc736071afb9e412115 100644 (file)
@@ -798,6 +798,17 @@ static void ilk_audio_codec_enable(struct intel_encoder *encoder,
        mutex_unlock(&i915->display.audio.mutex);
 }
 
+void intel_audio_sdp_split_update(struct intel_encoder *encoder,
+                                 const struct intel_crtc_state *crtc_state)
+{
+       struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+       enum transcoder trans = crtc_state->cpu_transcoder;
+
+       if (HAS_DP20(i915))
+               intel_de_rmw(i915, AUD_DP_2DOT0_CTRL(trans), AUD_ENABLE_SDP_SPLIT,
+                            crtc_state->sdp_split_enable ? AUD_ENABLE_SDP_SPLIT : 0);
+}
+
 /**
  * intel_audio_codec_enable - Enable the audio codec for HD audio
  * @encoder: encoder on which to enable audio
index 63b22131dc456ed293959f1150685f2db1b6079e..1b87257c6a175d739a2563941cbaff2e95137a0b 100644 (file)
@@ -22,5 +22,7 @@ void intel_audio_cdclk_change_pre(struct drm_i915_private *dev_priv);
 void intel_audio_cdclk_change_post(struct drm_i915_private *dev_priv);
 void intel_audio_init(struct drm_i915_private *dev_priv);
 void intel_audio_deinit(struct drm_i915_private *dev_priv);
+void intel_audio_sdp_split_update(struct intel_encoder *encoder,
+                                 const struct intel_crtc_state *crtc_state);
 
 #endif /* __INTEL_AUDIO_H__ */
index 0f1ec2a98cc870d21a2a356a3160b4b569849bd9..5f9a2410fc4c35e7dd0859cf1d917c80c6f069d7 100644 (file)
@@ -2948,6 +2948,9 @@ static void intel_enable_ddi(struct intel_atomic_state *state,
 
        intel_vrr_enable(encoder, crtc_state);
 
+       /* Enable/Disable DP2.0 SDP split config before transcoder */
+       intel_audio_sdp_split_update(encoder, crtc_state);
+
        intel_enable_transcoder(crtc_state);
 
        intel_crtc_vblank_on(crtc_state);
index f07395065a69f4f82e9329e543f5f0ae3b59eb9b..ff3ef37d099e7db8fa6afa11100b55d8614e714c 100644 (file)
@@ -1295,6 +1295,8 @@ struct intel_crtc_state {
        /* Forward Error correction State */
        bool fec_enable;
 
+       bool sdp_split_enable;
+
        /* Pointer to master transcoder in case of tiled displays */
        enum transcoder master_transcoder;
 
index 67089711d9e25d265ccf0e6d6bf663e7a2a64bae..cf8a2f644baba158bcb907af10671c08adaf6331 100644 (file)
@@ -2009,6 +2009,23 @@ intel_dp_compute_output_format(struct intel_encoder *encoder,
        return ret;
 }
 
+static void
+intel_dp_audio_compute_config(struct intel_encoder *encoder,
+                             struct intel_crtc_state *pipe_config,
+                             struct drm_connector_state *conn_state)
+{
+       struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+       struct drm_connector *connector = conn_state->connector;
+
+       pipe_config->sdp_split_enable =
+               intel_dp_has_audio(encoder, pipe_config, conn_state) &&
+               intel_dp_is_uhbr(pipe_config);
+
+       drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] SDP split enable: %s\n",
+                   connector->base.id, connector->name,
+                   str_yes_no(pipe_config->sdp_split_enable));
+}
+
 int
 intel_dp_compute_config(struct intel_encoder *encoder,
                        struct intel_crtc_state *pipe_config,
@@ -2092,6 +2109,8 @@ intel_dp_compute_config(struct intel_encoder *encoder,
                adjusted_mode->crtc_clock /= n;
        }
 
+       intel_dp_audio_compute_config(encoder, pipe_config, conn_state);
+
        intel_link_compute_m_n(output_bpp,
                               pipe_config->lane_count,
                               adjusted_mode->crtc_clock,