riscv: dts: sophgo: use real clock for sdhci

As the clk patch is merged, Use real clocks for sdhci0.

Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB4953CA5D46EA8913B130D502BB052@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

diff --git a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
index 75d0c57f4ffbffd17b28cdc13f5d0bb509e5a51a..891932ae470f3421ee6a9c0ee2660603f9904c69 100644 (file)
--- a/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv18xx.dtsi
@@ -47,13 +47,6 @@
                #clock-cells = <0>;
        };
 
-       sdhci_clk: sdhci-clock {
-               compatible = "fixed-clock";
-               clock-frequency = <375000000>;
-               clock-output-names = "sdhci_clk";
-               #clock-cells = <0>;
-       };
-
        soc {
                compatible = "simple-bus";
                interrupt-parent = <&plic>;
@@ -298,8 +291,9 @@
                        compatible = "sophgo,cv1800b-dwcmshc";
                        reg = <0x4310000 0x1000>;
                        interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&sdhci_clk>;
-                       clock-names = "core";
+                       clocks = <&clk CLK_AXI4_SD0>,
+                                <&clk CLK_SD0>;
+                       clock-names = "core", "bus";
                        status = "disabled";
                };