accel/habanalabs: handle f/w reserved dram space request
authorDani Liberman <dliberman@habana.ai>
Tue, 20 Jun 2023 09:09:17 +0000 (12:09 +0300)
committerOded Gabbay <ogabbay@kernel.org>
Mon, 9 Oct 2023 09:37:19 +0000 (12:37 +0300)
It is possible for FW to request reserved space in dram.
If the device supports this option, it will retrieve the size from the
f/w and will reserve it.

Currently we add the common code infrastructure to support it.

Signed-off-by: Dani Liberman <dliberman@habana.ai>
Reviewed-by: Oded Gabbay <ogabbay@kernel.org>
Signed-off-by: Oded Gabbay <ogabbay@kernel.org>
drivers/accel/habanalabs/common/firmware_if.c
drivers/accel/habanalabs/common/habanalabs.h
drivers/accel/habanalabs/include/common/hl_boot_if.h

index c7da69dbfa0ab55ba6ba98d8dc583c7c575e9393..2bc775d29854b642973b5682b78cfb4ef2af2072 100644 (file)
@@ -2783,6 +2783,11 @@ static int hl_fw_dynamic_init_cpu(struct hl_device *hdev,
                                hdev->decoder_binning, hdev->rotator_binning);
                }
 
+               if (hdev->asic_prop.support_dynamic_resereved_fw_size) {
+                       hdev->asic_prop.reserved_fw_mem_size =
+                               le32_to_cpu(fw_loader->dynamic_loader.comm_desc.rsvd_mem_size_mb);
+               }
+
                return 0;
        }
 
index b6b099e8133cabe71a60b58b7d2ebb1a7f110453..e69b9b195f48903b333d1e0028cafdbe52402b9c 100644 (file)
@@ -641,6 +641,7 @@ struct hl_hints_range {
  * @glbl_err_cause_num: global err cause number.
  * @hbw_flush_reg: register to read to generate HBW flush. value of 0 means HBW flush is
  *                 not supported.
+ * @reserved_fw_mem_size: size in MB of dram memory reserved for FW.
  * @collective_first_sob: first sync object available for collective use
  * @collective_first_mon: first monitor available for collective use
  * @sync_stream_first_sob: first sync object available for sync stream use
@@ -689,6 +690,7 @@ struct hl_hints_range {
  * @dma_mask: the dma mask to be set for this device
  * @supports_advanced_cpucp_rc: true if new cpucp opcodes are supported.
  * @supports_engine_modes: true if changing engines/engine_cores modes is supported.
+ * @support_dynamic_resereved_fw_size: true if we support dynamic reserved size for fw.
  */
 struct asic_fixed_properties {
        struct hw_queue_properties      *hw_queues_props;
@@ -772,6 +774,7 @@ struct asic_fixed_properties {
        u32                             num_of_special_blocks;
        u32                             glbl_err_cause_num;
        u32                             hbw_flush_reg;
+       u32                             reserved_fw_mem_size;
        u16                             collective_first_sob;
        u16                             collective_first_mon;
        u16                             sync_stream_first_sob;
@@ -808,6 +811,7 @@ struct asic_fixed_properties {
        u8                              dma_mask;
        u8                              supports_advanced_cpucp_rc;
        u8                              supports_engine_modes;
+       u8                              support_dynamic_resereved_fw_size;
 };
 
 /**
index cff79f7f9f751fe9fcc33e586625a35e18f68854..7de8a5786a36edc6147ab7d386d5a7b176baabf2 100644 (file)
@@ -570,6 +570,8 @@ struct lkd_fw_comms_desc {
        __le64 img_addr;        /* address for next FW component load */
        struct lkd_fw_binning_info binning_info;
        struct lkd_fw_ascii_msg ascii_msg[LKD_FW_ASCII_MSG_MAX];
+       __le32 rsvd_mem_size_mb; /* reserved memory size [MB] for FW/SVE */
+       char reserved1[4];
 };
 
 enum comms_reset_cause {
@@ -596,6 +598,9 @@ struct lkd_fw_comms_msg {
                        __le64 img_addr;
                        struct lkd_fw_binning_info binning_info;
                        struct lkd_fw_ascii_msg ascii_msg[LKD_FW_ASCII_MSG_MAX];
+                       /* reserved memory size [MB] for FW/SVE */
+                       __le32 rsvd_mem_size_mb;
+                       char reserved1[4];
                };
                struct {
                        __u8 reset_cause;