*/
 static const struct drm_bridge_timings default_dac_timings = {
        /* Timing specifications, datasheet page 7 */
-       .sampling_edge = DRM_BUS_FLAG_PIXDATA_POSEDGE,
+       .sampling_edge = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
        .setup_time_ps = 500,
        .hold_time_ps = 1500,
 };
  */
 static const struct drm_bridge_timings ti_ths8134_dac_timings = {
        /* From timing diagram, datasheet page 9 */
-       .sampling_edge = DRM_BUS_FLAG_PIXDATA_POSEDGE,
+       .sampling_edge = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
        /* From datasheet, page 12 */
        .setup_time_ps = 3000,
        /* I guess this means latched input */
  */
 static const struct drm_bridge_timings ti_ths8135_dac_timings = {
        /* From timing diagram, datasheet page 14 */
-       .sampling_edge = DRM_BUS_FLAG_PIXDATA_POSEDGE,
+       .sampling_edge = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
        /* From datasheet, page 16 */
        .setup_time_ps = 2000,
        .hold_time_ps = 500,
 
                                         &bus_format, 1);
        tc->connector.display_info.bus_flags =
                DRM_BUS_FLAG_DE_HIGH |
-               DRM_BUS_FLAG_PIXDATA_NEGEDGE |
-               DRM_BUS_FLAG_SYNC_NEGEDGE;
+               DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE |
+               DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE;
        drm_connector_attach_encoder(&tc->connector, tc->bridge.encoder);
 
        return 0;
 
  * @bus_flags: information about pixelclk, sync and DE polarity will be stored
  * here
  *
- * Sets DRM_BUS_FLAG_DE_(LOW|HIGH),  DRM_BUS_FLAG_PIXDATA_(POS|NEG)EDGE and
- * DISPLAY_FLAGS_SYNC_(POS|NEG)EDGE in @bus_flags according to DISPLAY_FLAGS
+ * Sets DRM_BUS_FLAG_DE_(LOW|HIGH),  DRM_BUS_FLAG_PIXDATA_DRIVE_(POS|NEG)EDGE
+ * and DISPLAY_FLAGS_SYNC_(POS|NEG)EDGE in @bus_flags according to DISPLAY_FLAGS
  * found in @vm
  */
 void drm_bus_flags_from_videomode(const struct videomode *vm, u32 *bus_flags)
 {
        *bus_flags = 0;
        if (vm->flags & DISPLAY_FLAGS_PIXDATA_POSEDGE)
-               *bus_flags |= DRM_BUS_FLAG_PIXDATA_POSEDGE;
+               *bus_flags |= DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE;
        if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
-               *bus_flags |= DRM_BUS_FLAG_PIXDATA_NEGEDGE;
+               *bus_flags |= DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE;
 
        if (vm->flags & DISPLAY_FLAGS_SYNC_POSEDGE)
-               *bus_flags |= DRM_BUS_FLAG_SYNC_POSEDGE;
+               *bus_flags |= DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE;
        if (vm->flags & DISPLAY_FLAGS_SYNC_NEGEDGE)
-               *bus_flags |= DRM_BUS_FLAG_SYNC_NEGEDGE;
+               *bus_flags |= DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE;
 
        if (vm->flags & DISPLAY_FLAGS_DE_LOW)
                *bus_flags |= DRM_BUS_FLAG_DE_LOW;
 
        drm_display_mode_to_videomode(mode, &vm);
 
        /* INV_PXCK as default (most display sample data on rising edge) */
-       if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE))
+       if (!(con->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE))
                pol |= DCU_SYN_POL_INV_PXCK;
 
        if (vm.flags & DISPLAY_FLAGS_HSYNC_LOW)
 
        sig_cfg.enable_pol = !(imx_crtc_state->bus_flags & DRM_BUS_FLAG_DE_LOW);
        /* Default to driving pixel data on negative clock edges */
        sig_cfg.clk_pol = !!(imx_crtc_state->bus_flags &
-                            DRM_BUS_FLAG_PIXDATA_POSEDGE);
+                            DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE);
        sig_cfg.bus_format = imx_crtc_state->bus_format;
        sig_cfg.v_to_h_sync = 0;
        sig_cfg.hsync_pin = imx_crtc_state->di_hsync_pin;
 
        if (!(bus_flags & DRM_BUS_FLAG_DE_LOW))
                vdctrl0 |= VDCTRL0_ENABLE_ACT_HIGH;
        /*
-        * DRM_BUS_FLAG_PIXDATA_ defines are controller centric,
+        * DRM_BUS_FLAG_PIXDATA_DRIVE_ defines are controller centric,
         * controllers VDCTRL0_DOTCLK is display centric.
         * Drive on positive edge       -> display samples on falling edge
-        * DRM_BUS_FLAG_PIXDATA_POSEDGE -> VDCTRL0_DOTCLK_ACT_FALLING
+        * DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE -> VDCTRL0_DOTCLK_ACT_FALLING
         */
-       if (bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE)
+       if (bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE)
                vdctrl0 |= VDCTRL0_DOTCLK_ACT_FALLING;
 
        writel(vdctrl0, mxsfb->base + LCDC_VDCTRL0);
 
        dssdev->type = OMAP_DISPLAY_TYPE_DPI;
        dssdev->owner = THIS_MODULE;
        dssdev->of_ports = BIT(1) | BIT(0);
-       dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_SYNC_POSEDGE
-                         | DRM_BUS_FLAG_PIXDATA_POSEDGE;
+       dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH
+                         | DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE
+                         | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE;
 
        dssdev->next = omapdss_of_find_connected_device(pdev->dev.of_node, 1);
        if (IS_ERR(dssdev->next)) {
 
         * DE is active LOW
         * DATA needs to be driven on the FALLING edge
         */
-       dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_SYNC_NEGEDGE
-                         | DRM_BUS_FLAG_PIXDATA_POSEDGE;
+       dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH
+                         | DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE
+                         | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE;
 
        omapdss_display_init(dssdev);
        omapdss_device_register(dssdev);
 
        dssdev->owner = THIS_MODULE;
        dssdev->of_ports = BIT(0);
        dssdev->ops_flags = OMAP_DSS_DEVICE_OP_MODES;
-       dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_SYNC_POSEDGE
-                         | DRM_BUS_FLAG_PIXDATA_POSEDGE;
+       dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH
+                         | DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE
+                         | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE;
 
        omapdss_display_init(dssdev);
        omapdss_device_register(dssdev);
 
         * Note: According to the panel documentation:
         * DATA needs to be driven on the FALLING edge
         */
-       dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_SYNC_NEGEDGE
-                         | DRM_BUS_FLAG_PIXDATA_POSEDGE;
+       dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH
+                         | DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE
+                         | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE;
 
        omapdss_display_init(dssdev);
        omapdss_device_register(dssdev);
 
        dssdev->owner = THIS_MODULE;
        dssdev->of_ports = BIT(0);
        dssdev->ops_flags = OMAP_DSS_DEVICE_OP_MODES;
-       dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_SYNC_NEGEDGE
-                         | DRM_BUS_FLAG_PIXDATA_POSEDGE;
+       dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH
+                         | DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE
+                         | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE;
 
        omapdss_display_init(dssdev);
        omapdss_device_register(dssdev);
 
         * Note: According to the panel documentation:
         * SYNC needs to be driven on the FALLING edge
         */
-       dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_SYNC_POSEDGE
-                         | DRM_BUS_FLAG_PIXDATA_NEGEDGE;
+       dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH
+                         | DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE
+                         | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE;
 
        omapdss_display_init(dssdev);
        omapdss_device_register(dssdev);
 
         * Note: According to the panel documentation:
         * SYNC needs to be driven on the FALLING edge
         */
-       dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_SYNC_POSEDGE
-                         | DRM_BUS_FLAG_PIXDATA_NEGEDGE;
+       dssdev->bus_flags = DRM_BUS_FLAG_DE_HIGH
+                         | DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE
+                         | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE;
 
        omapdss_display_init(dssdev);
        omapdss_device_register(dssdev);
 
        out->ops = &dsi_ops;
        out->owner = THIS_MODULE;
        out->of_ports = BIT(0);
-       out->bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE
+       out->bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE
                       | DRM_BUS_FLAG_DE_HIGH
-                      | DRM_BUS_FLAG_SYNC_NEGEDGE;
+                      | DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE;
 
        r = omapdss_device_init_output(out);
        if (r < 0)
 
        out->of_ports = BIT(1);
        out->ops = &sdi_ops;
        out->owner = THIS_MODULE;
-       out->bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE   /* 15.5.9.1.2 */
-                      | DRM_BUS_FLAG_SYNC_POSEDGE;
+       out->bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE     /* 15.5.9.1.2 */
+                      | DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE;
 
        r = omapdss_device_init_output(out);
        if (r < 0)
 
 
                if (!(vm.flags & (DISPLAY_FLAGS_PIXDATA_POSEDGE |
                                  DISPLAY_FLAGS_PIXDATA_NEGEDGE))) {
-                       if (bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE)
+                       if (bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE)
                                vm.flags |= DISPLAY_FLAGS_PIXDATA_POSEDGE;
-                       else if (bus_flags & DRM_BUS_FLAG_PIXDATA_NEGEDGE)
+                       else if (bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
                                vm.flags |= DISPLAY_FLAGS_PIXDATA_NEGEDGE;
                }
 
                if (!(vm.flags & (DISPLAY_FLAGS_SYNC_POSEDGE |
                                  DISPLAY_FLAGS_SYNC_NEGEDGE))) {
-                       if (bus_flags & DRM_BUS_FLAG_SYNC_POSEDGE)
+                       if (bus_flags & DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE)
                                vm.flags |= DISPLAY_FLAGS_SYNC_POSEDGE;
-                       else if (bus_flags & DRM_BUS_FLAG_SYNC_NEGEDGE)
+                       else if (bus_flags & DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE)
                                vm.flags |= DISPLAY_FLAGS_SYNC_NEGEDGE;
                }
        }
 
                        .vrefresh = 390,
                        .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
                },
-               .bus_flags = DRM_BUS_FLAG_PIXDATA_NEGEDGE,
+               .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
        },
        /*
         * Sanyo ALR252RGT 240x320 portrait display found on the
                        .vrefresh = 116,
                        .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
                },
-               .bus_flags = DRM_BUS_FLAG_PIXDATA_NEGEDGE,
+               .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
                .ib2 = true,
        },
 };
 
        if (ili->conf->dclk_active_high) {
                reg = ILI9322_POL_DCLK;
                connector->display_info.bus_flags |=
-                       DRM_BUS_FLAG_PIXDATA_POSEDGE;
+                       DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE;
        } else {
                reg = 0;
                connector->display_info.bus_flags |=
-                       DRM_BUS_FLAG_PIXDATA_NEGEDGE;
+                       DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE;
        }
        if (ili->conf->de_active_high) {
                reg |= ILI9322_POL_DE;
 
                .height = 57,
        },
        .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
-       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_NEGEDGE,
+       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
 };
 
 static const struct of_device_id platform_of_match[] = {
 
                .width = 95,
                .height = 54,
        },
-       .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE,
+       .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
 };
 
 static const struct drm_display_mode cdtech_s070wv95_ct16_mode = {
                .height = 91,
        },
        .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
-       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE,
+       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
 };
 
 static const struct display_timing dlc_dlc0700yzg_1_timing = {
                .height = 86,
        },
        .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
-       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_NEGEDGE,
+       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
 };
 
 static const struct drm_display_mode edt_etm0700g0dh6_mode = {
                .height = 91,
        },
        .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
-       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_NEGEDGE,
+       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
 };
 
 static const struct panel_desc edt_etm0700g0bdh6 = {
                .height = 91,
        },
        .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
-       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE,
+       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
 };
 
 static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = {
                .height = 54,
        },
        .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
-       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE,
+       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
 };
 
 static const struct drm_display_mode innolux_at070tn92_mode = {
                .height = 54,
        },
        .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
-       .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE,
+       .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
 };
 
 static const struct drm_display_mode netron_dy_e231732_mode = {
                .height = 54,
        },
        .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
-       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE |
-                    DRM_BUS_FLAG_SYNC_POSEDGE,
+       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE |
+                    DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE,
 };
 
 static const struct display_timing nlt_nl192108ac18_02d_timing = {
                .height = 93,
        },
        .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
-       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE,
+       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
 };
 
 static const struct drm_display_mode pda_91_00156_a0_mode = {
                .height = 116,
        },
        .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
-       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_POSEDGE,
+       .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
 };
 
 static const struct drm_display_mode tpk_f07a_0102_mode = {
                .width = 152,
                .height = 91,
        },
-       .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE,
+       .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
 };
 
 static const struct drm_display_mode tpk_f10a_0102_mode = {
 
                        .vtotal = 480 + 10 + 1 + 35,
                        .vrefresh = 60,
                },
-               .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE,
+               .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
        },
        {
                .name = "640x480 RGB",
                        .vtotal = 480 + 18 + 1 + 27,
                        .vrefresh = 60,
                },
-               .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE,
+               .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
        },
        {
                .name = "480x272 RGB",
                        .vtotal = 272 + 2 + 1 + 12,
                        .vrefresh = 60,
                },
-               .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE,
+               .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
        },
        {
                .name = "480x640 RGB",
                        .vtotal = 640 + 4 + 1 + 8,
                        .vrefresh = 60,
                },
-               .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE,
+               .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
        },
        {
                .name = "400x240 RGB",
                        .vtotal = 240 + 2 + 1 + 20,
                        .vrefresh = 60,
                },
-               .bus_flags = DRM_BUS_FLAG_PIXDATA_POSEDGE,
+               .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
        },
 };
 
 
                        tim2 |= TIM2_IOE;
 
                if (connector->display_info.bus_flags &
-                   DRM_BUS_FLAG_PIXDATA_NEGEDGE)
+                   DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
                        tim2 |= TIM2_IPC;
        }
 
 
         * Following code is a way to avoid quirks all around TCON
         * and DOTCLOCK drivers.
         */
-       if (display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_POSEDGE)
+       if (display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE)
                clk_set_phase(tcon->dclk, 240);
 
-       if (display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_NEGEDGE)
+       if (display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
                clk_set_phase(tcon->dclk, 0);
 
        regmap_update_bits(tcon->regs, SUN4I_TCON0_IO_POL_REG,
 
        /* Vsync IRQ at start of Vsync at first */
        ctrl1 |= TVE200_VSTSTYPE_VSYNC;
 
-       if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_NEGEDGE)
+       if (connector->display_info.bus_flags &
+           DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
                ctrl1 |= TVE200_CTRL_TVCLKP;
 
        if ((mode->hdisplay == 352 && mode->vdisplay == 240) || /* SIF(525) */
 
        /**
         * @sampling_edge:
         *
-        * Tells whether the bridge samples the digital input signal
-        * from the display engine on the positive or negative edge of the
-        * clock, this should reuse the DRM_BUS_FLAG_PIXDATA_[POS|NEG]EDGE
-        * bitwise flags from the DRM connector (bit 2 and 3 valid).
+        * Tells whether the bridge samples the digital input signals from the
+        * display engine on the positive or negative edge of the clock. This
+        * should use the DRM_BUS_FLAG_PIXDATA_SAMPLE_[POS|NEG]EDGE and
+        * DRM_BUS_FLAG_SYNC_SAMPLE_[POS|NEG]EDGE bitwise flags from the DRM
+        * connector (bit 2, 3, 6 and 7 valid).
         */
        u32 sampling_edge;
        /**