ath11k: add software monitor ring descriptor for full monitor
authorAnilkumar Kolli <akolli@codeaurora.org>
Wed, 8 Dec 2021 08:44:00 +0000 (10:44 +0200)
committerKalle Valo <quic_kvalo@quicinc.com>
Thu, 9 Dec 2021 08:10:32 +0000 (10:10 +0200)
In full monitor mode, monitor destination ring is read in
software monitor ring descriptor format instead of
reo_entrance_ring format. Add new sw_mon_ring descriptor.

Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.4.0.1-01734-QCAHKSWPL_SILICONZ-1

Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org>
Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
Link: https://lore.kernel.org/r/1638881695-22155-3-git-send-email-akolli@codeaurora.org
drivers/net/wireless/ath/ath11k/hal_desc.h
drivers/net/wireless/ath/ath11k/hal_rx.c
drivers/net/wireless/ath/ath11k/hal_rx.h

index 00b595b84939f759f8457d6cf8af1f62cdfa85fa..406767672844018ef5b64c288118c6cd8620d307 100644 (file)
@@ -858,6 +858,25 @@ struct hal_reo_entrance_ring {
  *             this ring has looped around the ring.
  */
 
+#define HAL_SW_MON_RING_INFO0_RXDMA_PUSH_REASON        GENMASK(1, 0)
+#define HAL_SW_MON_RING_INFO0_RXDMA_ERROR_CODE GENMASK(6, 2)
+#define HAL_SW_MON_RING_INFO0_MPDU_FRAG_NUMBER GENMASK(10, 7)
+#define HAL_SW_MON_RING_INFO0_FRAMELESS_BAR    BIT(11)
+#define HAL_SW_MON_RING_INFO0_STATUS_BUF_CNT   GENMASK(15, 12)
+#define HAL_SW_MON_RING_INFO0_END_OF_PPDU      BIT(16)
+
+#define HAL_SW_MON_RING_INFO1_PHY_PPDU_ID      GENMASK(15, 0)
+#define HAL_SW_MON_RING_INFO1_RING_ID          GENMASK(27, 20)
+#define HAL_SW_MON_RING_INFO1_LOOPING_COUNT    GENMASK(31, 28)
+
+struct hal_sw_monitor_ring {
+       struct ath11k_buffer_addr buf_addr_info;
+       struct rx_mpdu_desc rx_mpdu_info;
+       struct ath11k_buffer_addr status_buf_addr_info;
+       u32 info0;
+       u32 info1;
+} __packed;
+
 #define HAL_REO_CMD_HDR_INFO0_CMD_NUMBER       GENMASK(15, 0)
 #define HAL_REO_CMD_HDR_INFO0_STATUS_REQUIRED  BIT(16)
 
index 0e43e215c10af0b196e12fc5f2ff27d777812569..1e279e99baa82fe31188f9e1c763d357e47f7bd1 100644 (file)
@@ -1185,3 +1185,47 @@ void ath11k_hal_rx_reo_ent_buf_paddr_get(void *rx_desc, dma_addr_t *paddr,
 
        *pp_buf_addr = (void *)buf_addr_info;
 }
+
+void
+ath11k_hal_rx_sw_mon_ring_buf_paddr_get(void *rx_desc,
+                                       struct hal_sw_mon_ring_entries *sw_mon_entries)
+{
+       struct hal_sw_monitor_ring *sw_mon_ring = rx_desc;
+       struct ath11k_buffer_addr *buf_addr_info;
+       struct ath11k_buffer_addr *status_buf_addr_info;
+       struct rx_mpdu_desc *rx_mpdu_desc_info_details;
+
+       rx_mpdu_desc_info_details = &sw_mon_ring->rx_mpdu_info;
+
+       sw_mon_entries->msdu_cnt = FIELD_GET(RX_MPDU_DESC_INFO0_MSDU_COUNT,
+                                            rx_mpdu_desc_info_details->info0);
+
+       buf_addr_info = &sw_mon_ring->buf_addr_info;
+       status_buf_addr_info = &sw_mon_ring->status_buf_addr_info;
+
+       sw_mon_entries->mon_dst_paddr = (((u64)FIELD_GET(BUFFER_ADDR_INFO1_ADDR,
+                                       buf_addr_info->info1)) << 32) |
+                                       FIELD_GET(BUFFER_ADDR_INFO0_ADDR,
+                                                 buf_addr_info->info0);
+
+       sw_mon_entries->mon_status_paddr =
+                       (((u64)FIELD_GET(BUFFER_ADDR_INFO1_ADDR,
+                                        status_buf_addr_info->info1)) << 32) |
+                               FIELD_GET(BUFFER_ADDR_INFO0_ADDR,
+                                         status_buf_addr_info->info0);
+
+       sw_mon_entries->mon_dst_sw_cookie = FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE,
+                                                     buf_addr_info->info1);
+
+       sw_mon_entries->mon_status_sw_cookie = FIELD_GET(BUFFER_ADDR_INFO1_SW_COOKIE,
+                                                        status_buf_addr_info->info1);
+
+       sw_mon_entries->status_buf_count = FIELD_GET(HAL_SW_MON_RING_INFO0_STATUS_BUF_CNT,
+                                                    sw_mon_ring->info0);
+
+       sw_mon_entries->dst_buf_addr_info = buf_addr_info;
+       sw_mon_entries->status_buf_addr_info = status_buf_addr_info;
+
+       sw_mon_entries->ppdu_id =
+               FIELD_GET(HAL_SW_MON_RING_INFO1_PHY_PPDU_ID, sw_mon_ring->info1);
+}
index 0f1f04b812b92ceba6d87c67b78ddd5da7d2374f..8db420ef63519a12df3bdfae5be06a3d6d91d00a 100644 (file)
@@ -77,6 +77,20 @@ enum hal_rx_mon_status {
        HAL_RX_MON_STATUS_BUF_DONE,
 };
 
+struct hal_sw_mon_ring_entries {
+       dma_addr_t mon_dst_paddr;
+       dma_addr_t mon_status_paddr;
+       u32 mon_dst_sw_cookie;
+       u32 mon_status_sw_cookie;
+       void *dst_buf_addr_info;
+       void *status_buf_addr_info;
+       u16 ppdu_id;
+       u8 status_buf_count;
+       u8 msdu_cnt;
+       bool end_of_ppdu;
+       bool drop_ppdu;
+};
+
 struct hal_rx_mon_ppdu_info {
        u32 ppdu_id;
        u32 ppdu_ts;
@@ -331,6 +345,9 @@ void ath11k_hal_rx_reo_ent_buf_paddr_get(void *rx_desc,
                                         dma_addr_t *paddr, u32 *sw_cookie,
                                         void **pp_buf_addr_info, u8 *rbm,
                                         u32 *msdu_cnt);
+void
+ath11k_hal_rx_sw_mon_ring_buf_paddr_get(void *rx_desc,
+                                       struct hal_sw_mon_ring_entries *sw_mon_ent);
 enum hal_rx_mon_status
 ath11k_hal_rx_parse_mon_status(struct ath11k_base *ab,
                               struct hal_rx_mon_ppdu_info *ppdu_info,