memory_offsets; /** offset wrt hdr in bytes */
u32 prog_name_offset; /** offset wrt hdr in bytes */
u32 size; /** Size of blob */
- u32 padding_size; /** total cummulative of bytes added due to section alignment */
+ u32 padding_size; /** total accumulation of bytes added due to section alignment */
u32 icache_source; /** Position of icache in blob */
u32 icache_size; /** Size of icache section */
u32 icache_padding;/** bytes added due to icache section alignment */
};
/* Acceleration firmware descriptor.
- * This descriptor descibes either SP code (stand-alone), or
+ * This descriptor describes either SP code (stand-alone), or
* ISP code (a separate pipeline stage).
*/
struct ia_css_acc_fw_hdr {