x86/bugs: Switch to new Intel CPU model defines
authorTony Luck <tony.luck@intel.com>
Wed, 24 Apr 2024 18:15:06 +0000 (11:15 -0700)
committerBorislav Petkov (AMD) <bp@alien8.de>
Thu, 25 Apr 2024 10:27:25 +0000 (12:27 +0200)
New CPU #defines encode vendor and family as well as model.

Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Acked-by: Josh Poimboeuf <jpoimboe@kernel.org>
Link: https://lore.kernel.org/r/20240424181506.41673-1-tony.luck@intel.com
arch/x86/kernel/cpu/bugs.c

index ca295b0c1eeee05b812c27bb88bd814dba3c1f00..32d86dd976c0f494752868ef898a4a1331ebda65 100644 (file)
@@ -26,7 +26,7 @@
 #include <asm/msr.h>
 #include <asm/vmx.h>
 #include <asm/paravirt.h>
-#include <asm/intel-family.h>
+#include <asm/cpu_device_id.h>
 #include <asm/e820/api.h>
 #include <asm/hypervisor.h>
 #include <asm/tlbflush.h>
@@ -2390,20 +2390,20 @@ static void override_cache_bits(struct cpuinfo_x86 *c)
        if (c->x86 != 6)
                return;
 
-       switch (c->x86_model) {
-       case INTEL_FAM6_NEHALEM:
-       case INTEL_FAM6_WESTMERE:
-       case INTEL_FAM6_SANDYBRIDGE:
-       case INTEL_FAM6_IVYBRIDGE:
-       case INTEL_FAM6_HASWELL:
-       case INTEL_FAM6_HASWELL_L:
-       case INTEL_FAM6_HASWELL_G:
-       case INTEL_FAM6_BROADWELL:
-       case INTEL_FAM6_BROADWELL_G:
-       case INTEL_FAM6_SKYLAKE_L:
-       case INTEL_FAM6_SKYLAKE:
-       case INTEL_FAM6_KABYLAKE_L:
-       case INTEL_FAM6_KABYLAKE:
+       switch (c->x86_vfm) {
+       case INTEL_NEHALEM:
+       case INTEL_WESTMERE:
+       case INTEL_SANDYBRIDGE:
+       case INTEL_IVYBRIDGE:
+       case INTEL_HASWELL:
+       case INTEL_HASWELL_L:
+       case INTEL_HASWELL_G:
+       case INTEL_BROADWELL:
+       case INTEL_BROADWELL_G:
+       case INTEL_SKYLAKE_L:
+       case INTEL_SKYLAKE:
+       case INTEL_KABYLAKE_L:
+       case INTEL_KABYLAKE:
                if (c->x86_cache_bits < 44)
                        c->x86_cache_bits = 44;
                break;