serial: max310x: fail probe if clock crystal is unstable

A stable clock is really required in order to use this UART, so log an
error message and bail out if the chip reports that the clock is not
stable.

Fixes: 4cf9a888fd3c ("serial: max310x: Check the clock readiness")
Cc: stable@vger.kernel.org
Suggested-by: Jan Kundrát <jan.kundrat@cesnet.cz>
Link: https://www.spinics.net/lists/linux-serial/msg35773.html
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Link: https://lore.kernel.org/r/20240116213001.3691629-4-hugo@hugovil.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c
index c0eb0615d945bc78a87a8b0197b2355cab437606..552e153a24e05ed2f0ae4dc8177d19c7b9ccc527 100644 (file)
--- a/drivers/tty/serial/max310x.c
+++ b/drivers/tty/serial/max310x.c
@@ -587,7 +587,7 @@ static int max310x_update_best_err(unsigned long f, long *besterr)
        return 1;
 }
 
-static u32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
+static s32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
                               unsigned long freq, bool xtal)
 {
        unsigned int div, clksrc, pllcfg = 0;
@@ -657,7 +657,8 @@ static u32 max310x_set_ref_clk(struct device *dev, struct max310x_port *s,
                } while (!stable && (++try < MAX310X_XTAL_WAIT_RETRIES));
 
                if (!stable)
-                       dev_warn(dev, "clock is not stable yet\n");
+                       return dev_err_probe(dev, -EAGAIN,
+                                            "clock is not stable\n");
        }
 
        return bestfreq;
@@ -1282,7 +1283,7 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
 {
        int i, ret, fmin, fmax, freq;
        struct max310x_port *s;
-       u32 uartclk = 0;
+       s32 uartclk = 0;
        bool xtal;
 
        for (i = 0; i < devtype->nr; i++)
@@ -1360,6 +1361,11 @@ static int max310x_probe(struct device *dev, const struct max310x_devtype *devty
        }
 
        uartclk = max310x_set_ref_clk(dev, s, freq, xtal);
+       if (uartclk < 0) {
+               ret = uartclk;
+               goto out_uart;
+       }
+
        dev_dbg(dev, "Reference clock set to %i Hz\n", uartclk);
 
        for (i = 0; i < devtype->nr; i++) {