target-arm queue:
* Add missing SVE-enabled check to ADDVL/ADDPL/RDVL
* virt-acpi-build: use PCIE_MMCFG_BUS to retrieve end_bus_number
* virt-acpi-build: Fix SMMUv3 GSIV values
* Allow EL0 to write to arch timer registers, not just read them
* bcm2836_control: Implement local timer
# gpg: Signature made Fri 15 Mar 2019 11:37:29 GMT
# gpg: using RSA key
E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-
20190315:
target/arm: Check access permission to ADDVL/ADDPL/RDVL
hw/arm/virt-acpi-build: use PCIE_MMCFG_BUS to retrieve end_bus_number
target/arm: change arch timer registers access permission
hw/arm/virt-acpi-build: Fix SMMUv3 GSIV values
hw/intc/bcm2836_control: Implement local timer
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>