arm64: KVM: Force VHE for systems affected by erratum 1165522

In order to easily mitigate ARM erratum 1165522, we need to force
affected CPUs to run in VHE mode if using KVM.

Reviewed-by: James Morse <james.morse@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h
index 6e2d254c09ebc1204d7f03e20f042d934e7caf70..62d8cd15fdf237a44ceb82e62cc2104ad42f5f44 100644 (file)
--- a/arch/arm64/include/asm/cpucaps.h
+++ b/arch/arm64/include/asm/cpucaps.h
@@ -54,7 +54,8 @@
 #define ARM64_HAS_CRC32                                33
 #define ARM64_SSBS                             34
 #define ARM64_WORKAROUND_1188873               35
+#define ARM64_WORKAROUND_1165522               36
 
-#define ARM64_NCAPS                            36
+#define ARM64_NCAPS                            37
 
 #endif /* __ASM_CPUCAPS_H */

diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index d6d9aa76a943faf5ac4bea506e344e175cbf920b..9217759afa6bd20ba4a2a898cf60891fb603503a 100644 (file)
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -432,6 +432,10 @@ static inline bool kvm_arch_requires_vhe(void)
        if (system_supports_sve())
                return true;
 
+       /* Some implementations have defects that confine them to VHE */
+       if (cpus_have_cap(ARM64_WORKAROUND_1165522))
+               return true;
+
        return false;
 }
 

diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c
index a509e35132d225a4eef28af288969abab47ef9b3..476e738e6c46841a68949cd10f3f3ca0ef77f0de 100644 (file)
--- a/arch/arm64/kernel/cpu_errata.c
+++ b/arch/arm64/kernel/cpu_errata.c
@@ -739,6 +739,14 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
                .capability = ARM64_WORKAROUND_1188873,
                ERRATA_MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 2, 0),
        },
+#endif
+#ifdef CONFIG_ARM64_ERRATUM_1165522
+       {
+               /* Cortex-A76 r0p0 to r2p0 */
+               .desc = "ARM erratum 1165522",
+               .capability = ARM64_WORKAROUND_1165522,
+               ERRATA_MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 2, 0),
+       },
 #endif
        {
        }