target/arm: Align vector registers
authorRichard Henderson <richard.henderson@linaro.org>
Tue, 12 Sep 2017 13:50:01 +0000 (06:50 -0700)
committerRichard Henderson <richard.henderson@linaro.org>
Thu, 8 Feb 2018 15:54:06 +0000 (15:54 +0000)
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
target/arm/cpu.h

index d2bb59ededc9631c102b987f856259ed462322f0..8d41f783dce890ad48145859a13a5420ac6a567a 100644 (file)
@@ -492,7 +492,7 @@ typedef struct CPUARMState {
          * the two execution states, and means we do not need to explicitly
          * map these registers when changing states.
          */
-        uint64_t regs[64];
+        uint64_t regs[64] QEMU_ALIGNED(16);
 
         uint32_t xregs[16];
         /* We store these fpcsr fields separately for convenience.  */