TESTS_PATH = $(SRC_PATH)/tests/tcg/tricore
+ASM_TESTS_PATH = $(TESTS_PATH)/asm
LDFLAGS = -T$(TESTS_PATH)/link.ld --mcpu=tc162
ASFLAGS = -mtc162
-TESTS += test_abs.tst
-TESTS += test_bmerge.tst
-TESTS += test_clz.tst
-TESTS += test_dextr.tst
-TESTS += test_dvstep.tst
-TESTS += test_fadd.tst
-TESTS += test_fmul.tst
-TESTS += test_ftoi.tst
-TESTS += test_imask.tst
-TESTS += test_insert.tst
-TESTS += test_ld_bu.tst
-TESTS += test_ld_h.tst
-TESTS += test_madd.tst
-TESTS += test_msub.tst
-TESTS += test_muls.tst
+TESTS += test_abs.asm.tst
+TESTS += test_bmerge.asm.tst
+TESTS += test_clz.asm.tst
+TESTS += test_dextr.asm.tst
+TESTS += test_dvstep.asm.tst
+TESTS += test_fadd.asm.tst
+TESTS += test_fmul.asm.tst
+TESTS += test_ftoi.asm.tst
+TESTS += test_imask.asm.tst
+TESTS += test_insert.asm.tst
+TESTS += test_ld_bu.asm.tst
+TESTS += test_ld_h.asm.tst
+TESTS += test_madd.asm.tst
+TESTS += test_msub.asm.tst
+TESTS += test_muls.asm.tst
QEMU_OPTS += -M tricore_testboard -cpu tc27x -nographic -kernel
-%.pS: $(TESTS_PATH)/%.S
+%.pS: $(ASM_TESTS_PATH)/%.S
$(HOST_CC) -E -o $@ $<
%.o: %.pS
$(AS) $(ASFLAGS) -o $@ $<
-%.tst: %.o
+%.asm.tst: %.o
$(LD) $(LDFLAGS) $< -o $@
# We don't currently support the multiarch system tests
--- /dev/null
+/* Helpers */
+#define LI(reg, val) \
+ mov.u reg, lo:val; \
+ movh DREG_TEMP_LI, up:val; \
+ or reg, reg, DREG_TEMP_LI; \
+
+#define LIA(reg, val) \
+ LI(DREG_TEMP, val) \
+ mov.a reg, DREG_TEMP;
+
+/* Address definitions */
+#define TESTDEV_ADDR 0xf0000000
+/* Register definitions */
+#define DREG_RS1 %d0
+#define DREG_RS2 %d1
+#define DREG_RS3 %d2
+#define DREG_CALC_RESULT %d3
+#define DREG_CALC_PSW %d4
+#define DREG_CORRECT_PSW %d5
+#define DREG_TEMP_LI %d10
+#define DREG_TEMP %d11
+#define DREG_TEST_NUM %d14
+#define DREG_CORRECT_RESULT %d15
+#define DREG_CORRECT_RESULT_2 %d13
+
+#define AREG_ADDR %a0
+#define AREG_CORRECT_RESULT %a3
+#define MEM_BASE_ADDR 0xd0000000
+
+#define DREG_DEV_ADDR %a15
+
+#define EREG_RS1 %e6
+#define EREG_RS1_LO %d6
+#define EREG_RS1_HI %d7
+#define EREG_RS2 %e8
+#define EREG_RS2_LO %d8
+#define EREG_RS2_HI %d9
+#define EREG_CALC_RESULT %e8
+#define EREG_CALC_RESULT_HI %d9
+#define EREG_CALC_RESULT_LO %d8
+#define EREG_CORRECT_RESULT_LO %d0
+#define EREG_CORRECT_RESULT_HI %d1
+
+/* Test case wrappers */
+#define TEST_CASE(num, testreg, correct, code...) \
+test_ ## num: \
+ code; \
+ LI(DREG_CORRECT_RESULT, correct) \
+ mov DREG_TEST_NUM, num; \
+ jne testreg, DREG_CORRECT_RESULT, fail \
+
+#define TEST_CASE_E(num, correct_lo, correct_hi, code...) \
+test_ ## num: \
+ code; \
+ mov DREG_TEST_NUM, num; \
+ LI(EREG_CORRECT_RESULT_LO, correct_lo) \
+ jne EREG_CALC_RESULT_LO, EREG_CORRECT_RESULT_LO, fail; \
+ LI(EREG_CORRECT_RESULT_HI, correct_hi) \
+ jne EREG_CALC_RESULT_HI, EREG_CORRECT_RESULT_HI, fail;
+
+#define TEST_CASE_PSW(num, testreg, correct, correct_psw, code...) \
+test_ ## num: \
+ code; \
+ LI(DREG_CORRECT_RESULT, correct) \
+ mov DREG_TEST_NUM, num; \
+ jne testreg, DREG_CORRECT_RESULT, fail; \
+ mfcr DREG_CALC_PSW, $psw; \
+ LI(DREG_CORRECT_PSW, correct_psw) \
+ mov DREG_TEST_NUM, num; \
+ jne DREG_CALC_PSW, DREG_CORRECT_PSW, fail;
+
+#define TEST_LD(insn, num, result, addr_result, ld_pattern) \
+test_ ## num: \
+ LIA(AREG_ADDR, test_data) \
+ insn DREG_CALC_RESULT, ld_pattern; \
+ LI(DREG_CORRECT_RESULT, result) \
+ mov DREG_TEST_NUM, num; \
+ jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail; \
+ mov.d DREG_CALC_RESULT, AREG_ADDR; \
+ LI(DREG_CORRECT_RESULT, addr_result) \
+ jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail;
+
+#define TEST_LD_SRO(insn, num, result, addr_result, ld_pattern) \
+test_ ## num: \
+ LIA(AREG_ADDR, test_data) \
+ insn %d15, ld_pattern; \
+ LI(DREG_CORRECT_RESULT_2, result) \
+ mov DREG_TEST_NUM, num; \
+ jne %d15, DREG_CORRECT_RESULT_2, fail; \
+ mov.d DREG_CALC_RESULT, AREG_ADDR; \
+ LI(DREG_CORRECT_RESULT, addr_result) \
+ jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail;
+
+
+/* Actual test case type
+ * e.g inst %dX, %dY -> TEST_D_D
+ * inst %dX, %dY, %dZ -> TEST_D_DD
+ * inst %eX, %dY, %dZ -> TEST_E_DD
+ */
+
+
+#define TEST_D_D(insn, num, result, rs1) \
+ TEST_CASE(num, DREG_CALC_RESULT, result, \
+ LI(DREG_RS1, rs1); \
+ insn DREG_CALC_RESULT, DREG_RS1; \
+ )
+
+#define TEST_D_D_PSW(insn, num, result, psw, rs1) \
+ TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
+ LI(DREG_RS1, rs1); \
+ rstv; \
+ insn DREG_CORRECT_RESULT, DREG_RS1; \
+ )
+
+#define TEST_D_DDD(insn, num, result, rs1, rs2, rs3) \
+ TEST_CASE(num, DREG_CALC_RESULT, result, \
+ LI(DREG_RS1, rs1); \
+ LI(DREG_RS2, rs2); \
+ LI(DREG_RS3, rs3); \
+ rstv; \
+ insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, DREG_RS3; \
+ )
+
+#define TEST_D_DD_PSW(insn, num, result, psw, rs1, rs2) \
+ TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
+ LI(DREG_RS1, rs1); \
+ LI(DREG_RS2, rs2); \
+ rstv; \
+ insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2; \
+ )
+
+#define TEST_D_DDD_PSW(insn, num, result, psw, rs1, rs2, rs3) \
+ TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
+ LI(DREG_RS1, rs1); \
+ LI(DREG_RS2, rs2); \
+ LI(DREG_RS3, rs3); \
+ rstv; \
+ insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, DREG_RS3; \
+ )
+
+#define TEST_D_DDI(insn, num, result, rs1, rs2, imm) \
+ TEST_CASE(num, DREG_CALC_RESULT, result, \
+ LI(DREG_RS1, rs1); \
+ LI(DREG_RS2, rs2); \
+ rstv; \
+ insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, imm; \
+ )
+
+#define TEST_D_DDI_PSW(insn, num, result, psw, rs1, rs2, imm) \
+ TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
+ LI(DREG_RS1, rs1); \
+ LI(DREG_RS2, rs2); \
+ rstv; \
+ insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, imm; \
+ )
+
+#define TEST_D_DIDI(insn, num, result, rs1, imm1, rs2, imm2) \
+ TEST_CASE(num, DREG_CALC_RESULT, result, \
+ LI(DREG_RS1, rs1); \
+ LI(DREG_RS2, rs1); \
+ rstv; \
+ insn DREG_CALC_RESULT, DREG_RS1, imm1, DREG_RS2, imm2; \
+ )
+
+#define TEST_E_ED(insn, num, res_hi, res_lo, rs1_hi, rs1_lo, rs2) \
+ TEST_CASE_E(num, res_lo, res_hi, \
+ LI(EREG_RS1_LO, rs1_lo); \
+ LI(EREG_RS1_HI, rs1_hi); \
+ LI(DREG_RS2, rs2); \
+ insn EREG_CALC_RESULT, EREG_RS1, DREG_RS2; \
+ )
+
+#define TEST_E_IDI(insn, num, res_hi, res_lo, imm1, rs1, imm2) \
+ TEST_CASE_E(num, res_lo, res_hi, \
+ LI(DREG_RS1, rs1); \
+ rstv; \
+ insn EREG_CALC_RESULT, imm1, DREG_RS1, imm2; \
+ )
+
+
+
+/* Pass/Fail handling part */
+#define TEST_PASSFAIL \
+ j pass; \
+fail: \
+ LI(DREG_TEMP, TESTDEV_ADDR) \
+ mov.a DREG_DEV_ADDR, DREG_TEMP; \
+ st.w [DREG_DEV_ADDR], DREG_TEST_NUM;\
+ debug; \
+ j fail; \
+pass: \
+ LI(DREG_TEMP, TESTDEV_ADDR) \
+ mov.a DREG_DEV_ADDR, DREG_TEMP; \
+ mov DREG_TEST_NUM, 0; \
+ st.w [DREG_DEV_ADDR], DREG_TEST_NUM;\
+ debug; \
+ j pass;
--- /dev/null
+#include "macros.h"
+.text
+.global _start
+_start:
+ TEST_D_D(abs, 1, 0, 0)
+
+ TEST_PASSFAIL
--- /dev/null
+#include "macros.h"
+.text
+.global _start
+_start:
+ TEST_D_DD_PSW(bmerge, 1, 0x555557f7, 0x00000b80, 0x0000001d, 0x0000ffff)
+
+ TEST_PASSFAIL
+
--- /dev/null
+#include "macros.h"
+.text
+.global _start
+_start:
+ TEST_D_D(cls.h, 1, 0x0, 0x6db17976)
+ TEST_D_D(cls.h, 2, 0x000f000f, 0x0)
+
+ TEST_PASSFAIL
+
--- /dev/null
+#include "macros.h"
+.text
+.global _start
+_start:
+# insn num result rs1 rs2 imm
+# | | | | | |
+ TEST_D_DDI(dextr, 1, 0xabcdef01, 0xabcdef01, 0x23456789, 0)
+ TEST_D_DDI(dextr, 2, 0x579bde02, 0xabcdef01, 0x23456789, 1)
+ TEST_D_DDI(dextr, 3, 0xaf37bc04, 0xabcdef01, 0x23456789, 2)
+ TEST_D_DDI(dextr, 4, 0x5e6f7809, 0xabcdef01, 0x23456789, 3)
+ TEST_D_DDI(dextr, 5, 0xbcdef012, 0xabcdef01, 0x23456789, 4)
+ TEST_D_DDI(dextr, 6, 0x79bde024, 0xabcdef01, 0x23456789, 5)
+ TEST_D_DDI(dextr, 7, 0xf37bc048, 0xabcdef01, 0x23456789, 6)
+ TEST_D_DDI(dextr, 8, 0xe6f78091, 0xabcdef01, 0x23456789, 7)
+ TEST_D_DDI(dextr, 9, 0xcdef0123, 0xabcdef01, 0x23456789, 8)
+ TEST_D_DDI(dextr, 10, 0x9bde0246, 0xabcdef01, 0x23456789, 9)
+ TEST_D_DDI(dextr, 11, 0x37bc048d, 0xabcdef01, 0x23456789, 10)
+ TEST_D_DDI(dextr, 12, 0x6f78091a, 0xabcdef01, 0x23456789, 11)
+ TEST_D_DDI(dextr, 13, 0xdef01234, 0xabcdef01, 0x23456789, 12)
+ TEST_D_DDI(dextr, 14, 0xbde02468, 0xabcdef01, 0x23456789, 13)
+ TEST_D_DDI(dextr, 15, 0x7bc048d1, 0xabcdef01, 0x23456789, 14)
+ TEST_D_DDI(dextr, 16, 0xf78091a2, 0xabcdef01, 0x23456789, 15)
+ TEST_D_DDI(dextr, 17, 0xef012345, 0xabcdef01, 0x23456789, 16)
+ TEST_D_DDI(dextr, 18, 0xde02468a, 0xabcdef01, 0x23456789, 17)
+ TEST_D_DDI(dextr, 19, 0xbc048d15, 0xabcdef01, 0x23456789, 18)
+ TEST_D_DDI(dextr, 20, 0x78091a2b, 0xabcdef01, 0x23456789, 19)
+ TEST_D_DDI(dextr, 21, 0xf0123456, 0xabcdef01, 0x23456789, 20)
+ TEST_D_DDI(dextr, 22, 0xe02468ac, 0xabcdef01, 0x23456789, 21)
+ TEST_D_DDI(dextr, 23, 0xc048d159, 0xabcdef01, 0x23456789, 22)
+ TEST_D_DDI(dextr, 24, 0x8091a2b3, 0xabcdef01, 0x23456789, 23)
+ TEST_D_DDI(dextr, 25, 0x01234567, 0xabcdef01, 0x23456789, 24)
+ TEST_D_DDI(dextr, 26, 0x02468acf, 0xabcdef01, 0x23456789, 25)
+ TEST_D_DDI(dextr, 27, 0x048d159e, 0xabcdef01, 0x23456789, 26)
+ TEST_D_DDI(dextr, 28, 0x091a2b3c, 0xabcdef01, 0x23456789, 27)
+ TEST_D_DDI(dextr, 29, 0x12345678, 0xabcdef01, 0x23456789, 28)
+ TEST_D_DDI(dextr, 30, 0x2468acf1, 0xabcdef01, 0x23456789, 29)
+ TEST_D_DDI(dextr, 31, 0x48d159e2, 0xabcdef01, 0x23456789, 30)
+ TEST_D_DDI(dextr, 32, 0x91a2b3c4, 0xabcdef01, 0x23456789, 31)
+
+# insn num result rs1 rs2 rs3
+# | | | | | |
+ TEST_D_DDD(dextr, 33, 0xabcdef01, 0xabcdef01, 0x23456789, 0)
+ TEST_D_DDD(dextr, 34, 0x579bde02, 0xabcdef01, 0x23456789, 1)
+ TEST_D_DDD(dextr, 35, 0xaf37bc04, 0xabcdef01, 0x23456789, 2)
+ TEST_D_DDD(dextr, 36, 0x5e6f7809, 0xabcdef01, 0x23456789, 3)
+ TEST_D_DDD(dextr, 37, 0xbcdef012, 0xabcdef01, 0x23456789, 4)
+ TEST_D_DDD(dextr, 38, 0x79bde024, 0xabcdef01, 0x23456789, 5)
+ TEST_D_DDD(dextr, 39, 0xf37bc048, 0xabcdef01, 0x23456789, 6)
+ TEST_D_DDD(dextr, 40, 0xe6f78091, 0xabcdef01, 0x23456789, 7)
+ TEST_D_DDD(dextr, 41, 0xcdef0123, 0xabcdef01, 0x23456789, 8)
+ TEST_D_DDD(dextr, 42, 0x9bde0246, 0xabcdef01, 0x23456789, 9)
+ TEST_D_DDD(dextr, 43, 0x37bc048d, 0xabcdef01, 0x23456789, 10)
+ TEST_D_DDD(dextr, 44, 0x6f78091a, 0xabcdef01, 0x23456789, 11)
+ TEST_D_DDD(dextr, 45, 0xdef01234, 0xabcdef01, 0x23456789, 12)
+ TEST_D_DDD(dextr, 46, 0xbde02468, 0xabcdef01, 0x23456789, 13)
+ TEST_D_DDD(dextr, 47, 0x7bc048d1, 0xabcdef01, 0x23456789, 14)
+ TEST_D_DDD(dextr, 48, 0xf78091a2, 0xabcdef01, 0x23456789, 15)
+ TEST_D_DDD(dextr, 49, 0xef012345, 0xabcdef01, 0x23456789, 16)
+ TEST_D_DDD(dextr, 51, 0xde02468a, 0xabcdef01, 0x23456789, 17)
+ TEST_D_DDD(dextr, 52, 0xbc048d15, 0xabcdef01, 0x23456789, 18)
+ TEST_D_DDD(dextr, 53, 0x78091a2b, 0xabcdef01, 0x23456789, 19)
+ TEST_D_DDD(dextr, 54, 0xf0123456, 0xabcdef01, 0x23456789, 20)
+ TEST_D_DDD(dextr, 55, 0xe02468ac, 0xabcdef01, 0x23456789, 21)
+ TEST_D_DDD(dextr, 56, 0xc048d159, 0xabcdef01, 0x23456789, 22)
+ TEST_D_DDD(dextr, 57, 0x8091a2b3, 0xabcdef01, 0x23456789, 23)
+ TEST_D_DDD(dextr, 58, 0x01234567, 0xabcdef01, 0x23456789, 24)
+ TEST_D_DDD(dextr, 59, 0x02468acf, 0xabcdef01, 0x23456789, 25)
+ TEST_D_DDD(dextr, 60, 0x048d159e, 0xabcdef01, 0x23456789, 26)
+ TEST_D_DDD(dextr, 61, 0x091a2b3c, 0xabcdef01, 0x23456789, 27)
+ TEST_D_DDD(dextr, 62, 0x12345678, 0xabcdef01, 0x23456789, 28)
+ TEST_D_DDD(dextr, 63, 0x2468acf1, 0xabcdef01, 0x23456789, 29)
+ TEST_D_DDD(dextr, 64, 0x48d159e2, 0xabcdef01, 0x23456789, 30)
+ TEST_D_DDD(dextr, 65, 0x91a2b3c4, 0xabcdef01, 0x23456789, 31)
+
+ TEST_PASSFAIL
--- /dev/null
+#include "macros.h"
+.text
+.global _start
+_start:
+ # Result RS1 RS2
+ TEST_E_ED(dvstep, 1, 0x000001ff, 0xfffe5cff, 0x00000001, 0xfffffe5c, 0x0)
+ TEST_E_ED(dvstep, 2, 0x00000000, 0x000000ff, 0x00000000, 0x00000000, 0x0)
+ TEST_E_ED(dvstep, 3, 0x0000f000, 0x000000fd, 0x010000f0, 0x00000000, 0x0)
+ TEST_E_ED(dvstep, 4, 0xfffff000, 0x00000000, 0x7ffffff0, 0x00000000, 0x0)
+ TEST_E_ED(dvstep.u, 5, 0xffffff00, 0x100008ff, 0xffffffff, 0x00100008, 0x0)
+ TEST_E_ED(dvstep.u, 6, 0x00000100, 0x00000000, 0x08000001, 0x00000000, \
+ 0xffffff2d)
+
+ TEST_PASSFAIL
+
--- /dev/null
+#include "macros.h"
+.text
+.global _start
+_start:
+ TEST_D_DD_PSW(add.f, 1, 0x7fc00000, 0x00000b80, 0xffffff85, 0x00001234)
+ TEST_D_DD_PSW(add.f, 2, 0xf9c00000, 0x00000b80, 0xf9400000, 0xf9400000)
+ TEST_D_DD_PSW(add.f, 3, 0x8bb858ca, 0x00000b80, 0x8b3858ca, 0x8b3858ca)
+ TEST_D_DD_PSW(add.f, 4, 0x00000000, 0x00000b80, 0x000000ff, 0x00000000)
+ TEST_D_DD_PSW(add.f, 5, 0x7fc00000, 0x00000b80, 0xfffffe52, 0x0a4cf70c)
+ TEST_D_DD_PSW(add.f, 6, 0x9e6d5076, 0x84000b80, 0x9ded50ec, 0x9ded4fff)
+ TEST_D_DD_PSW(add.f, 7, 0x00000000, 0x04000b80, 0x0000e8bd, 0x00000000)
+ TEST_D_DD_PSW(add.f, 8, 0x7fc00000, 0xc4000b80, 0xffad546e, 0xffad546e)
+ TEST_D_DD_PSW(add.f, 9, 0x7fc00000, 0x04000b80, 0xfffe0000, 0x08130000)
+
+ TEST_PASSFAIL
+
--- /dev/null
+#include "macros.h"
+.text
+.global _start
+_start:
+ TEST_D_DD_PSW(mul.f, 1, 0x974f4f0a, 0x84000b80, 0x1a0b1980, 0xbcbec42d)
+
+ TEST_PASSFAIL
+
--- /dev/null
+#include "macros.h"
+.text
+.global _start
+_start:
+ TEST_D_D_PSW(ftoi, 1, 0x0, 0x84000b80, 0x05f6e605)
+ TEST_D_D_PSW(ftoi, 2, 0x0, 0x04000b80, 0x00012200)
+ TEST_D_D_PSW(ftoi, 3, 0x0, 0xc4000b80, 0xffffffff)
+
+ TEST_PASSFAIL
+
--- /dev/null
+#include "macros.h"
+.text
+.global _start
+_start:
+# res[31:0]
+# insn num res[63:32] | imm1 rs1 imm2
+# | | | | | | |
+ TEST_E_IDI(imask, 1, 0x000f0000, 0x00050000, 0x5, 0x10, 0x4)
+
+ TEST_PASSFAIL
--- /dev/null
+#include "macros.h"
+.text
+.global _start
+_start:
+# insn num result rs1 imm1 rs2 imm2
+# | | | | | | |
+ TEST_D_DIDI(insert, 1, 0x7fffffff, 0xffffffff, 0xa, 0x10, 0x8)
+
+ TEST_PASSFAIL
--- /dev/null
+#include "macros.h"
+.data
+test_data:
+ .word 0xaffedead
+ .word 0x001122ff
+.text
+.global _start
+_start:
+# expect. addr reg val after load
+# insn num expect. load value | pattern for loading
+# | | | | |
+ TEST_LD(ld.bu, 1, 0xff, MEM_BASE_ADDR + 4, [+AREG_ADDR]4) # pre_inc
+ TEST_LD(ld.bu, 2, 0xad, MEM_BASE_ADDR + 4, [AREG_ADDR+]4) # post_inc
+
+ TEST_PASSFAIL
--- /dev/null
+#include "macros.h"
+.data
+test_data:
+ .word 0xaffedead
+ .word 0x001122ff
+.text
+.global _start
+_start:
+# expect. addr reg val after load
+# insn num expect. load value | pattern for loading
+# | | | | |
+ TEST_LD (ld.h, 1, 0xffffaffe, MEM_BASE_ADDR, [AREG_ADDR]2)
+ TEST_LD_SRO(ld.h, 2, 0x000022ff, MEM_BASE_ADDR, [AREG_ADDR]4)
+
+ TEST_PASSFAIL
--- /dev/null
+#include "macros.h"
+.text
+.global _start
+_start:
+ TEST_D_DDI_PSW(madd, 1, 0x0000fffd, 0x60000b80, 0x0000ffff, 0x7fffffff,2)
+ TEST_D_DDI_PSW(madd, 2, 0xffff7fff, 0x60000b80, 0xffff8001, 0x7fffffff,2)
+ TEST_D_DDD_PSW(madds.u, 3, 0xffffffff, 0x60000b80, 0x00000000, 0x80000000, \
+ 0x80000000)
+
+ TEST_PASSFAIL
+
--- /dev/null
+#include "macros.h"
+.text
+.global _start
+_start:
+ TEST_D_DDI_PSW(msub, 1, 0xd2fbe5e0, 0x00000b80,0x64003300, 0xff5420d4, -216)
+ TEST_D_DDI_PSW(msub, 2, 0xfffffc10, 0x00000b80,0xfffffe68, 0xfffffffd, -200)
+ TEST_D_DDD_PSW(msubs.u, 3, 0x0, 0x60000b80, 0x1, 0xffffffff, 0xffffffdb)
+ TEST_PASSFAIL
+
--- /dev/null
+#include "macros.h"
+.text
+.global _start
+_start:
+ TEST_D_DD_PSW(muls.u, 1, 0xffffffff, 0x78000b80, 0x80000001, 0xffffffff)
+ TEST_D_DD_PSW(muls.u, 2, 0xffffffff, 0x60000b80, 0xfffffffe, 0xffffffff)
+
+ TEST_PASSFAIL
+
+++ /dev/null
-/* Helpers */
-#define LI(reg, val) \
- mov.u reg, lo:val; \
- movh DREG_TEMP_LI, up:val; \
- or reg, reg, DREG_TEMP_LI; \
-
-#define LIA(reg, val) \
- LI(DREG_TEMP, val) \
- mov.a reg, DREG_TEMP;
-
-/* Address definitions */
-#define TESTDEV_ADDR 0xf0000000
-/* Register definitions */
-#define DREG_RS1 %d0
-#define DREG_RS2 %d1
-#define DREG_RS3 %d2
-#define DREG_CALC_RESULT %d3
-#define DREG_CALC_PSW %d4
-#define DREG_CORRECT_PSW %d5
-#define DREG_TEMP_LI %d10
-#define DREG_TEMP %d11
-#define DREG_TEST_NUM %d14
-#define DREG_CORRECT_RESULT %d15
-#define DREG_CORRECT_RESULT_2 %d13
-
-#define AREG_ADDR %a0
-#define AREG_CORRECT_RESULT %a3
-#define MEM_BASE_ADDR 0xd0000000
-
-#define DREG_DEV_ADDR %a15
-
-#define EREG_RS1 %e6
-#define EREG_RS1_LO %d6
-#define EREG_RS1_HI %d7
-#define EREG_RS2 %e8
-#define EREG_RS2_LO %d8
-#define EREG_RS2_HI %d9
-#define EREG_CALC_RESULT %e8
-#define EREG_CALC_RESULT_HI %d9
-#define EREG_CALC_RESULT_LO %d8
-#define EREG_CORRECT_RESULT_LO %d0
-#define EREG_CORRECT_RESULT_HI %d1
-
-/* Test case wrappers */
-#define TEST_CASE(num, testreg, correct, code...) \
-test_ ## num: \
- code; \
- LI(DREG_CORRECT_RESULT, correct) \
- mov DREG_TEST_NUM, num; \
- jne testreg, DREG_CORRECT_RESULT, fail \
-
-#define TEST_CASE_E(num, correct_lo, correct_hi, code...) \
-test_ ## num: \
- code; \
- mov DREG_TEST_NUM, num; \
- LI(EREG_CORRECT_RESULT_LO, correct_lo) \
- jne EREG_CALC_RESULT_LO, EREG_CORRECT_RESULT_LO, fail; \
- LI(EREG_CORRECT_RESULT_HI, correct_hi) \
- jne EREG_CALC_RESULT_HI, EREG_CORRECT_RESULT_HI, fail;
-
-#define TEST_CASE_PSW(num, testreg, correct, correct_psw, code...) \
-test_ ## num: \
- code; \
- LI(DREG_CORRECT_RESULT, correct) \
- mov DREG_TEST_NUM, num; \
- jne testreg, DREG_CORRECT_RESULT, fail; \
- mfcr DREG_CALC_PSW, $psw; \
- LI(DREG_CORRECT_PSW, correct_psw) \
- mov DREG_TEST_NUM, num; \
- jne DREG_CALC_PSW, DREG_CORRECT_PSW, fail;
-
-#define TEST_LD(insn, num, result, addr_result, ld_pattern) \
-test_ ## num: \
- LIA(AREG_ADDR, test_data) \
- insn DREG_CALC_RESULT, ld_pattern; \
- LI(DREG_CORRECT_RESULT, result) \
- mov DREG_TEST_NUM, num; \
- jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail; \
- mov.d DREG_CALC_RESULT, AREG_ADDR; \
- LI(DREG_CORRECT_RESULT, addr_result) \
- jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail;
-
-#define TEST_LD_SRO(insn, num, result, addr_result, ld_pattern) \
-test_ ## num: \
- LIA(AREG_ADDR, test_data) \
- insn %d15, ld_pattern; \
- LI(DREG_CORRECT_RESULT_2, result) \
- mov DREG_TEST_NUM, num; \
- jne %d15, DREG_CORRECT_RESULT_2, fail; \
- mov.d DREG_CALC_RESULT, AREG_ADDR; \
- LI(DREG_CORRECT_RESULT, addr_result) \
- jne DREG_CALC_RESULT, DREG_CORRECT_RESULT, fail;
-
-
-/* Actual test case type
- * e.g inst %dX, %dY -> TEST_D_D
- * inst %dX, %dY, %dZ -> TEST_D_DD
- * inst %eX, %dY, %dZ -> TEST_E_DD
- */
-
-
-#define TEST_D_D(insn, num, result, rs1) \
- TEST_CASE(num, DREG_CALC_RESULT, result, \
- LI(DREG_RS1, rs1); \
- insn DREG_CALC_RESULT, DREG_RS1; \
- )
-
-#define TEST_D_D_PSW(insn, num, result, psw, rs1) \
- TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
- LI(DREG_RS1, rs1); \
- rstv; \
- insn DREG_CORRECT_RESULT, DREG_RS1; \
- )
-
-#define TEST_D_DDD(insn, num, result, rs1, rs2, rs3) \
- TEST_CASE(num, DREG_CALC_RESULT, result, \
- LI(DREG_RS1, rs1); \
- LI(DREG_RS2, rs2); \
- LI(DREG_RS3, rs3); \
- rstv; \
- insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, DREG_RS3; \
- )
-
-#define TEST_D_DD_PSW(insn, num, result, psw, rs1, rs2) \
- TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
- LI(DREG_RS1, rs1); \
- LI(DREG_RS2, rs2); \
- rstv; \
- insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2; \
- )
-
-#define TEST_D_DDD_PSW(insn, num, result, psw, rs1, rs2, rs3) \
- TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
- LI(DREG_RS1, rs1); \
- LI(DREG_RS2, rs2); \
- LI(DREG_RS3, rs3); \
- rstv; \
- insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, DREG_RS3; \
- )
-
-#define TEST_D_DDI(insn, num, result, rs1, rs2, imm) \
- TEST_CASE(num, DREG_CALC_RESULT, result, \
- LI(DREG_RS1, rs1); \
- LI(DREG_RS2, rs2); \
- rstv; \
- insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, imm; \
- )
-
-#define TEST_D_DDI_PSW(insn, num, result, psw, rs1, rs2, imm) \
- TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \
- LI(DREG_RS1, rs1); \
- LI(DREG_RS2, rs2); \
- rstv; \
- insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, imm; \
- )
-
-#define TEST_D_DIDI(insn, num, result, rs1, imm1, rs2, imm2) \
- TEST_CASE(num, DREG_CALC_RESULT, result, \
- LI(DREG_RS1, rs1); \
- LI(DREG_RS2, rs1); \
- rstv; \
- insn DREG_CALC_RESULT, DREG_RS1, imm1, DREG_RS2, imm2; \
- )
-
-#define TEST_E_ED(insn, num, res_hi, res_lo, rs1_hi, rs1_lo, rs2) \
- TEST_CASE_E(num, res_lo, res_hi, \
- LI(EREG_RS1_LO, rs1_lo); \
- LI(EREG_RS1_HI, rs1_hi); \
- LI(DREG_RS2, rs2); \
- insn EREG_CALC_RESULT, EREG_RS1, DREG_RS2; \
- )
-
-#define TEST_E_IDI(insn, num, res_hi, res_lo, imm1, rs1, imm2) \
- TEST_CASE_E(num, res_lo, res_hi, \
- LI(DREG_RS1, rs1); \
- rstv; \
- insn EREG_CALC_RESULT, imm1, DREG_RS1, imm2; \
- )
-
-
-
-/* Pass/Fail handling part */
-#define TEST_PASSFAIL \
- j pass; \
-fail: \
- LI(DREG_TEMP, TESTDEV_ADDR) \
- mov.a DREG_DEV_ADDR, DREG_TEMP; \
- st.w [DREG_DEV_ADDR], DREG_TEST_NUM;\
- debug; \
- j fail; \
-pass: \
- LI(DREG_TEMP, TESTDEV_ADDR) \
- mov.a DREG_DEV_ADDR, DREG_TEMP; \
- mov DREG_TEST_NUM, 0; \
- st.w [DREG_DEV_ADDR], DREG_TEST_NUM;\
- debug; \
- j pass;
+++ /dev/null
-#include "macros.h"
-.text
-.global _start
-_start:
- TEST_D_D(abs, 1, 0, 0)
-
- TEST_PASSFAIL
+++ /dev/null
-#include "macros.h"
-.text
-.global _start
-_start:
- TEST_D_DD_PSW(bmerge, 1, 0x555557f7, 0x00000b80, 0x0000001d, 0x0000ffff)
-
- TEST_PASSFAIL
-
+++ /dev/null
-#include "macros.h"
-.text
-.global _start
-_start:
- TEST_D_D(cls.h, 1, 0x0, 0x6db17976)
- TEST_D_D(cls.h, 2, 0x000f000f, 0x0)
-
- TEST_PASSFAIL
-
+++ /dev/null
-#include "macros.h"
-.text
-.global _start
-_start:
-# insn num result rs1 rs2 imm
-# | | | | | |
- TEST_D_DDI(dextr, 1, 0xabcdef01, 0xabcdef01, 0x23456789, 0)
- TEST_D_DDI(dextr, 2, 0x579bde02, 0xabcdef01, 0x23456789, 1)
- TEST_D_DDI(dextr, 3, 0xaf37bc04, 0xabcdef01, 0x23456789, 2)
- TEST_D_DDI(dextr, 4, 0x5e6f7809, 0xabcdef01, 0x23456789, 3)
- TEST_D_DDI(dextr, 5, 0xbcdef012, 0xabcdef01, 0x23456789, 4)
- TEST_D_DDI(dextr, 6, 0x79bde024, 0xabcdef01, 0x23456789, 5)
- TEST_D_DDI(dextr, 7, 0xf37bc048, 0xabcdef01, 0x23456789, 6)
- TEST_D_DDI(dextr, 8, 0xe6f78091, 0xabcdef01, 0x23456789, 7)
- TEST_D_DDI(dextr, 9, 0xcdef0123, 0xabcdef01, 0x23456789, 8)
- TEST_D_DDI(dextr, 10, 0x9bde0246, 0xabcdef01, 0x23456789, 9)
- TEST_D_DDI(dextr, 11, 0x37bc048d, 0xabcdef01, 0x23456789, 10)
- TEST_D_DDI(dextr, 12, 0x6f78091a, 0xabcdef01, 0x23456789, 11)
- TEST_D_DDI(dextr, 13, 0xdef01234, 0xabcdef01, 0x23456789, 12)
- TEST_D_DDI(dextr, 14, 0xbde02468, 0xabcdef01, 0x23456789, 13)
- TEST_D_DDI(dextr, 15, 0x7bc048d1, 0xabcdef01, 0x23456789, 14)
- TEST_D_DDI(dextr, 16, 0xf78091a2, 0xabcdef01, 0x23456789, 15)
- TEST_D_DDI(dextr, 17, 0xef012345, 0xabcdef01, 0x23456789, 16)
- TEST_D_DDI(dextr, 18, 0xde02468a, 0xabcdef01, 0x23456789, 17)
- TEST_D_DDI(dextr, 19, 0xbc048d15, 0xabcdef01, 0x23456789, 18)
- TEST_D_DDI(dextr, 20, 0x78091a2b, 0xabcdef01, 0x23456789, 19)
- TEST_D_DDI(dextr, 21, 0xf0123456, 0xabcdef01, 0x23456789, 20)
- TEST_D_DDI(dextr, 22, 0xe02468ac, 0xabcdef01, 0x23456789, 21)
- TEST_D_DDI(dextr, 23, 0xc048d159, 0xabcdef01, 0x23456789, 22)
- TEST_D_DDI(dextr, 24, 0x8091a2b3, 0xabcdef01, 0x23456789, 23)
- TEST_D_DDI(dextr, 25, 0x01234567, 0xabcdef01, 0x23456789, 24)
- TEST_D_DDI(dextr, 26, 0x02468acf, 0xabcdef01, 0x23456789, 25)
- TEST_D_DDI(dextr, 27, 0x048d159e, 0xabcdef01, 0x23456789, 26)
- TEST_D_DDI(dextr, 28, 0x091a2b3c, 0xabcdef01, 0x23456789, 27)
- TEST_D_DDI(dextr, 29, 0x12345678, 0xabcdef01, 0x23456789, 28)
- TEST_D_DDI(dextr, 30, 0x2468acf1, 0xabcdef01, 0x23456789, 29)
- TEST_D_DDI(dextr, 31, 0x48d159e2, 0xabcdef01, 0x23456789, 30)
- TEST_D_DDI(dextr, 32, 0x91a2b3c4, 0xabcdef01, 0x23456789, 31)
-
-# insn num result rs1 rs2 rs3
-# | | | | | |
- TEST_D_DDD(dextr, 33, 0xabcdef01, 0xabcdef01, 0x23456789, 0)
- TEST_D_DDD(dextr, 34, 0x579bde02, 0xabcdef01, 0x23456789, 1)
- TEST_D_DDD(dextr, 35, 0xaf37bc04, 0xabcdef01, 0x23456789, 2)
- TEST_D_DDD(dextr, 36, 0x5e6f7809, 0xabcdef01, 0x23456789, 3)
- TEST_D_DDD(dextr, 37, 0xbcdef012, 0xabcdef01, 0x23456789, 4)
- TEST_D_DDD(dextr, 38, 0x79bde024, 0xabcdef01, 0x23456789, 5)
- TEST_D_DDD(dextr, 39, 0xf37bc048, 0xabcdef01, 0x23456789, 6)
- TEST_D_DDD(dextr, 40, 0xe6f78091, 0xabcdef01, 0x23456789, 7)
- TEST_D_DDD(dextr, 41, 0xcdef0123, 0xabcdef01, 0x23456789, 8)
- TEST_D_DDD(dextr, 42, 0x9bde0246, 0xabcdef01, 0x23456789, 9)
- TEST_D_DDD(dextr, 43, 0x37bc048d, 0xabcdef01, 0x23456789, 10)
- TEST_D_DDD(dextr, 44, 0x6f78091a, 0xabcdef01, 0x23456789, 11)
- TEST_D_DDD(dextr, 45, 0xdef01234, 0xabcdef01, 0x23456789, 12)
- TEST_D_DDD(dextr, 46, 0xbde02468, 0xabcdef01, 0x23456789, 13)
- TEST_D_DDD(dextr, 47, 0x7bc048d1, 0xabcdef01, 0x23456789, 14)
- TEST_D_DDD(dextr, 48, 0xf78091a2, 0xabcdef01, 0x23456789, 15)
- TEST_D_DDD(dextr, 49, 0xef012345, 0xabcdef01, 0x23456789, 16)
- TEST_D_DDD(dextr, 51, 0xde02468a, 0xabcdef01, 0x23456789, 17)
- TEST_D_DDD(dextr, 52, 0xbc048d15, 0xabcdef01, 0x23456789, 18)
- TEST_D_DDD(dextr, 53, 0x78091a2b, 0xabcdef01, 0x23456789, 19)
- TEST_D_DDD(dextr, 54, 0xf0123456, 0xabcdef01, 0x23456789, 20)
- TEST_D_DDD(dextr, 55, 0xe02468ac, 0xabcdef01, 0x23456789, 21)
- TEST_D_DDD(dextr, 56, 0xc048d159, 0xabcdef01, 0x23456789, 22)
- TEST_D_DDD(dextr, 57, 0x8091a2b3, 0xabcdef01, 0x23456789, 23)
- TEST_D_DDD(dextr, 58, 0x01234567, 0xabcdef01, 0x23456789, 24)
- TEST_D_DDD(dextr, 59, 0x02468acf, 0xabcdef01, 0x23456789, 25)
- TEST_D_DDD(dextr, 60, 0x048d159e, 0xabcdef01, 0x23456789, 26)
- TEST_D_DDD(dextr, 61, 0x091a2b3c, 0xabcdef01, 0x23456789, 27)
- TEST_D_DDD(dextr, 62, 0x12345678, 0xabcdef01, 0x23456789, 28)
- TEST_D_DDD(dextr, 63, 0x2468acf1, 0xabcdef01, 0x23456789, 29)
- TEST_D_DDD(dextr, 64, 0x48d159e2, 0xabcdef01, 0x23456789, 30)
- TEST_D_DDD(dextr, 65, 0x91a2b3c4, 0xabcdef01, 0x23456789, 31)
-
- TEST_PASSFAIL
+++ /dev/null
-#include "macros.h"
-.text
-.global _start
-_start:
- # Result RS1 RS2
- TEST_E_ED(dvstep, 1, 0x000001ff, 0xfffe5cff, 0x00000001, 0xfffffe5c, 0x0)
- TEST_E_ED(dvstep, 2, 0x00000000, 0x000000ff, 0x00000000, 0x00000000, 0x0)
- TEST_E_ED(dvstep, 3, 0x0000f000, 0x000000fd, 0x010000f0, 0x00000000, 0x0)
- TEST_E_ED(dvstep, 4, 0xfffff000, 0x00000000, 0x7ffffff0, 0x00000000, 0x0)
- TEST_E_ED(dvstep.u, 5, 0xffffff00, 0x100008ff, 0xffffffff, 0x00100008, 0x0)
- TEST_E_ED(dvstep.u, 6, 0x00000100, 0x00000000, 0x08000001, 0x00000000, \
- 0xffffff2d)
-
- TEST_PASSFAIL
-
+++ /dev/null
-#include "macros.h"
-.text
-.global _start
-_start:
- TEST_D_DD_PSW(add.f, 1, 0x7fc00000, 0x00000b80, 0xffffff85, 0x00001234)
- TEST_D_DD_PSW(add.f, 2, 0xf9c00000, 0x00000b80, 0xf9400000, 0xf9400000)
- TEST_D_DD_PSW(add.f, 3, 0x8bb858ca, 0x00000b80, 0x8b3858ca, 0x8b3858ca)
- TEST_D_DD_PSW(add.f, 4, 0x00000000, 0x00000b80, 0x000000ff, 0x00000000)
- TEST_D_DD_PSW(add.f, 5, 0x7fc00000, 0x00000b80, 0xfffffe52, 0x0a4cf70c)
- TEST_D_DD_PSW(add.f, 6, 0x9e6d5076, 0x84000b80, 0x9ded50ec, 0x9ded4fff)
- TEST_D_DD_PSW(add.f, 7, 0x00000000, 0x04000b80, 0x0000e8bd, 0x00000000)
- TEST_D_DD_PSW(add.f, 8, 0x7fc00000, 0xc4000b80, 0xffad546e, 0xffad546e)
- TEST_D_DD_PSW(add.f, 9, 0x7fc00000, 0x04000b80, 0xfffe0000, 0x08130000)
-
- TEST_PASSFAIL
-
+++ /dev/null
-#include "macros.h"
-.text
-.global _start
-_start:
- TEST_D_DD_PSW(mul.f, 1, 0x974f4f0a, 0x84000b80, 0x1a0b1980, 0xbcbec42d)
-
- TEST_PASSFAIL
-
+++ /dev/null
-#include "macros.h"
-.text
-.global _start
-_start:
- TEST_D_D_PSW(ftoi, 1, 0x0, 0x84000b80, 0x05f6e605)
- TEST_D_D_PSW(ftoi, 2, 0x0, 0x04000b80, 0x00012200)
- TEST_D_D_PSW(ftoi, 3, 0x0, 0xc4000b80, 0xffffffff)
-
- TEST_PASSFAIL
-
+++ /dev/null
-#include "macros.h"
-.text
-.global _start
-_start:
-# res[31:0]
-# insn num res[63:32] | imm1 rs1 imm2
-# | | | | | | |
- TEST_E_IDI(imask, 1, 0x000f0000, 0x00050000, 0x5, 0x10, 0x4)
-
- TEST_PASSFAIL
+++ /dev/null
-#include "macros.h"
-.text
-.global _start
-_start:
-# insn num result rs1 imm1 rs2 imm2
-# | | | | | | |
- TEST_D_DIDI(insert, 1, 0x7fffffff, 0xffffffff, 0xa, 0x10, 0x8)
-
- TEST_PASSFAIL
+++ /dev/null
-#include "macros.h"
-.data
-test_data:
- .word 0xaffedead
- .word 0x001122ff
-.text
-.global _start
-_start:
-# expect. addr reg val after load
-# insn num expect. load value | pattern for loading
-# | | | | |
- TEST_LD(ld.bu, 1, 0xff, MEM_BASE_ADDR + 4, [+AREG_ADDR]4) # pre_inc
- TEST_LD(ld.bu, 2, 0xad, MEM_BASE_ADDR + 4, [AREG_ADDR+]4) # post_inc
-
- TEST_PASSFAIL
+++ /dev/null
-#include "macros.h"
-.data
-test_data:
- .word 0xaffedead
- .word 0x001122ff
-.text
-.global _start
-_start:
-# expect. addr reg val after load
-# insn num expect. load value | pattern for loading
-# | | | | |
- TEST_LD (ld.h, 1, 0xffffaffe, MEM_BASE_ADDR, [AREG_ADDR]2)
- TEST_LD_SRO(ld.h, 2, 0x000022ff, MEM_BASE_ADDR, [AREG_ADDR]4)
-
- TEST_PASSFAIL
+++ /dev/null
-#include "macros.h"
-.text
-.global _start
-_start:
- TEST_D_DDI_PSW(madd, 1, 0x0000fffd, 0x60000b80, 0x0000ffff, 0x7fffffff,2)
- TEST_D_DDI_PSW(madd, 2, 0xffff7fff, 0x60000b80, 0xffff8001, 0x7fffffff,2)
- TEST_D_DDD_PSW(madds.u, 3, 0xffffffff, 0x60000b80, 0x00000000, 0x80000000, \
- 0x80000000)
-
- TEST_PASSFAIL
-
+++ /dev/null
-#include "macros.h"
-.text
-.global _start
-_start:
- TEST_D_DDI_PSW(msub, 1, 0xd2fbe5e0, 0x00000b80,0x64003300, 0xff5420d4, -216)
- TEST_D_DDI_PSW(msub, 2, 0xfffffc10, 0x00000b80,0xfffffe68, 0xfffffffd, -200)
- TEST_D_DDD_PSW(msubs.u, 3, 0x0, 0x60000b80, 0x1, 0xffffffff, 0xffffffdb)
- TEST_PASSFAIL
-
+++ /dev/null
-#include "macros.h"
-.text
-.global _start
-_start:
- TEST_D_DD_PSW(muls.u, 1, 0xffffffff, 0x78000b80, 0x80000001, 0xffffffff)
- TEST_D_DD_PSW(muls.u, 2, 0xffffffff, 0x60000b80, 0xfffffffe, 0xffffffff)
-
- TEST_PASSFAIL
-
projects / qemu.git / commitdiff