arm64: dts: qcom: msm8994-octagon: Configure Lattice iCE40 FPGA

Octagon devices have a Lattice iCE40 FPGA connected over SPI.
Configure it.

Signed-off-by: Gustave Monce <gustave.monce@outlook.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210131013853.55810-13-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi
index 730bd473be6b3d0322c146aee9952f8d6794ca67..0417c31316d3b66575c6611e98f1f0f3a125e4b1 100644 (file)
--- a/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon.dtsi
@@ -304,6 +304,27 @@
        status = "okay";
 };
 
+&blsp2_spi4 {
+       status = "okay";
+
+       /*
+        * This device is a Lattice UC120 USB-C PD PHY.
+        * It is actually a Lattice iCE40 FPGA pre-programmed by
+        * the device firmware with a specific bitstream
+        * enabling USB Type C PHY functionality.
+        * Communication is done via a proprietary protocol over SPI.
+        *
+        * TODO: Once a proper driver is available, replace this.
+        */
+       uc120: ice5lp2k@0 {
+               compatible = "lattice,ice40-fpga-mgr";
+               reg = <0>;
+               spi-max-frequency = <5000000>;
+               cdone-gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
+               reset-gpios = <&pmi8994_gpios 4 GPIO_ACTIVE_LOW>;
+       };
+};
+
 &blsp2_uart2 {
        status = "okay";