iommu/vt-d: Avoid unnecessary cache flush in pasid entry teardown

When a present pasid entry is disassembled, all kinds of pasid related
caches need to be flushed. But when a pasid entry is not being used
(PRESENT bit not set), we don't need to do this. Check the PRESENT bit
in intel_pasid_tear_down_entry() and avoid flushing caches if it's not
set.

Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Link: https://lore.kernel.org/r/20210320025415.641201-6-baolu.lu@linux.intel.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>

diff --git a/drivers/iommu/intel/pasid.c b/drivers/iommu/intel/pasid.c
index 8f2a702ce429ded4b31f31b6b6f9d428d5fc40a6..477b2e1d303c0d8b6d27ec7bf846b0cec178f4d5 100644 (file)
--- a/drivers/iommu/intel/pasid.c
+++ b/drivers/iommu/intel/pasid.c
@@ -517,6 +517,9 @@ void intel_pasid_tear_down_entry(struct intel_iommu *iommu, struct device *dev,
        if (WARN_ON(!pte))
                return;
 
+       if (!(pte->val[0] & PASID_PTE_PRESENT))
+               return;
+
        did = pasid_get_domain_id(pte);
        intel_pasid_clear_entry(dev, pasid, fault_ignore);