crypto: octeontx2 - update CPT inbound inline IPsec mailbox

Updates CPT inbound inline IPsec configure mailbox to take
CPT credit threshold and bpid, which are introduced
in CN10KB.

Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/marvell/octeontx2/otx2_cpt_common.h b/drivers/crypto/marvell/octeontx2/otx2_cpt_common.h
index 807db0da52cc2a1dee8ee8ecaa95f33d261e4d51..e0c1bbad93cc109ba21e8f4d466368a964dd0429 100644 (file)
--- a/drivers/crypto/marvell/octeontx2/otx2_cpt_common.h
+++ b/drivers/crypto/marvell/octeontx2/otx2_cpt_common.h
@@ -56,6 +56,8 @@ struct otx2_cpt_rx_inline_lf_cfg {
        u16 param2;
        u16 opcode;
        u32 credit;
+       u32 credit_th;
+       u16 bpid;
        u32 reserved;
 };
 

diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c b/drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c
index a6f16438bd4af892fbd2f23121c4ead4dc6d5a4c..bbabb57b46651afbb657aaac19b26bb48a80bb43 100644 (file)
--- a/drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c
+++ b/drivers/crypto/marvell/octeontx2/otx2_cptpf_mbox.c
@@ -171,6 +171,8 @@ static int rx_inline_ipsec_lf_cfg(struct otx2_cptpf_dev *cptpf, u8 egrp,
        nix_req->hdr.id = MBOX_MSG_NIX_INLINE_IPSEC_CFG;
        nix_req->hdr.sig = OTX2_MBOX_REQ_SIG;
        nix_req->enable = 1;
+       nix_req->credit_th = req->credit_th;
+       nix_req->bpid = req->bpid;
        if (!req->credit || req->credit > OTX2_CPT_INST_QLEN_MSGS)
                nix_req->cpt_credit = OTX2_CPT_INST_QLEN_MSGS - 1;
        else

diff --git a/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c b/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
index e319aa1ff1191e8da12428de0953775f41b083f9..5c94846461725d4e4f56dbeb32b71f53a1acfc5c 100644 (file)
--- a/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
+++ b/drivers/crypto/marvell/octeontx2/otx2_cptpf_ucode.c
@@ -16,7 +16,11 @@
 #define LOADFVC_MAJOR_OP 0x01
 #define LOADFVC_MINOR_OP 0x08
 
-#define CTX_FLUSH_TIMER_CNT 0xFFFFFF
+/*
+ * Interval to flush dirty data for next CTX entry. The interval is measured
+ * in increments of 10ns(interval time = CTX_FLUSH_TIMER_COUNT * 10ns).
+ */
+#define CTX_FLUSH_TIMER_CNT 0x2FAF0
 
 struct fw_info_t {
        struct list_head ucodes;