scsi: ufs: ufs-qcom: Use device parameter initialization function
authorStanley Chu <stanley.chu@mediatek.com>
Mon, 16 Nov 2020 06:50:49 +0000 (14:50 +0800)
committerMartin K. Petersen <martin.petersen@oracle.com>
Tue, 17 Nov 2020 06:03:18 +0000 (01:03 -0500)
Use common device parameter initialization function instead of initializing
those parameters by vendor driver itself.

Link: https://lore.kernel.org/r/20201116065054.7658-5-stanley.chu@mediatek.com
Reviewed-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/scsi/ufs/ufs-qcom.c
drivers/scsi/ufs/ufs-qcom.h

index 357c3b49321d28274187a532aa2e62cc3b2ac8ae..04adfbd1075312a67071e520c2c4ee34cd6a0fe7 100644 (file)
@@ -691,19 +691,8 @@ static int ufs_qcom_pwr_change_notify(struct ufs_hba *hba,
 
        switch (status) {
        case PRE_CHANGE:
-               ufs_qcom_cap.tx_lanes = UFS_QCOM_LIMIT_NUM_LANES_TX;
-               ufs_qcom_cap.rx_lanes = UFS_QCOM_LIMIT_NUM_LANES_RX;
-               ufs_qcom_cap.hs_rx_gear = UFS_QCOM_LIMIT_HSGEAR_RX;
-               ufs_qcom_cap.hs_tx_gear = UFS_QCOM_LIMIT_HSGEAR_TX;
-               ufs_qcom_cap.pwm_rx_gear = UFS_QCOM_LIMIT_PWMGEAR_RX;
-               ufs_qcom_cap.pwm_tx_gear = UFS_QCOM_LIMIT_PWMGEAR_TX;
-               ufs_qcom_cap.rx_pwr_pwm = UFS_QCOM_LIMIT_RX_PWR_PWM;
-               ufs_qcom_cap.tx_pwr_pwm = UFS_QCOM_LIMIT_TX_PWR_PWM;
-               ufs_qcom_cap.rx_pwr_hs = UFS_QCOM_LIMIT_RX_PWR_HS;
-               ufs_qcom_cap.tx_pwr_hs = UFS_QCOM_LIMIT_TX_PWR_HS;
+               ufshcd_init_pwr_dev_param(&ufs_qcom_cap);
                ufs_qcom_cap.hs_rate = UFS_QCOM_LIMIT_HS_RATE;
-               ufs_qcom_cap.desired_working_mode =
-                                       UFS_QCOM_LIMIT_DESIRED_MODE;
 
                if (host->hw_ver.major == 0x1) {
                        /*
index 3f4922743b3e3000eac2b54006a06dda19ae625c..8208e3a3ef59d2b55f02695b645aae80c1c9cf37 100644 (file)
 #define SLOW 1
 #define FAST 2
 
-#define UFS_QCOM_LIMIT_NUM_LANES_RX    2
-#define UFS_QCOM_LIMIT_NUM_LANES_TX    2
-#define UFS_QCOM_LIMIT_HSGEAR_RX       UFS_HS_G3
-#define UFS_QCOM_LIMIT_HSGEAR_TX       UFS_HS_G3
-#define UFS_QCOM_LIMIT_PWMGEAR_RX      UFS_PWM_G4
-#define UFS_QCOM_LIMIT_PWMGEAR_TX      UFS_PWM_G4
-#define UFS_QCOM_LIMIT_RX_PWR_PWM      SLOW_MODE
-#define UFS_QCOM_LIMIT_TX_PWR_PWM      SLOW_MODE
-#define UFS_QCOM_LIMIT_RX_PWR_HS       FAST_MODE
-#define UFS_QCOM_LIMIT_TX_PWR_HS       FAST_MODE
 #define UFS_QCOM_LIMIT_HS_RATE         PA_HS_MODE_B
-#define UFS_QCOM_LIMIT_DESIRED_MODE    FAST
 
 /* QCOM UFS host controller vendor specific registers */
 enum {