drm/amd/display: add prefix to amdgpu_dm_plane.h functions

The amdgpu_dm_plane.h functions didn't have names that indicated where
they were declared.

To better filter results in debug tools like ftrace, prefix these
functions with 'amdgpu_dm_plane_'.

Note that we may want to make this same change in other files like
amdgpu_dm_crtc.h.

Signed-off-by: David Tadokoro <davidbtadokoro@usp.br>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/Documentation/gpu/amdgpu/display/display-manager.rst b/Documentation/gpu/amdgpu/display/display-manager.rst
index b7abb18cfc820f4ba5ac5fcf1fbab1254356fc16..be2651ecdd7f2ab8b1560444ac944ba2da1f7f68 100644 (file)
--- a/Documentation/gpu/amdgpu/display/display-manager.rst
+++ b/Documentation/gpu/amdgpu/display/display-manager.rst
@@ -173,7 +173,7 @@ The alpha blending equation is configured from DRM to DC interface by the
 following path:
 
 1. When updating a :c:type:`drm_plane_state <drm_plane_state>`, DM calls
-   :c:type:`fill_blending_from_plane_state()` that maps
+   :c:type:`amdgpu_dm_plane_fill_blending_from_plane_state()` that maps
    :c:type:`drm_plane_state <drm_plane_state>` attributes to
    :c:type:`dc_plane_info <dc_plane_info>` struct to be handled in the
    OS-agnostic component (DC).

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index c27fb97b013513178ffdd40f33987b01b8a80323..6db59972ae27c649d81b88a3ce1ec9a85f061dc8 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2960,7 +2960,7 @@ const struct amdgpu_ip_block_version dm_ip_block =
 
 static const struct drm_mode_config_funcs amdgpu_dm_mode_funcs = {
        .fb_create = amdgpu_display_user_framebuffer_create,
-       .get_format_info = amd_get_format_info,
+       .get_format_info = amdgpu_dm_plane_get_format_info,
        .atomic_check = amdgpu_dm_atomic_check,
        .atomic_commit = drm_atomic_helper_commit,
 };
@@ -4978,7 +4978,7 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev,
        if (ret)
                return ret;
 
-       ret = fill_plane_buffer_attributes(adev, afb, plane_info->format,
+       ret = amdgpu_dm_plane_fill_plane_buffer_attributes(adev, afb, plane_info->format,
                                           plane_info->rotation, tiling_flags,
                                           &plane_info->tiling_info,
                                           &plane_info->plane_size,
@@ -4987,7 +4987,7 @@ fill_dc_plane_info_and_addr(struct amdgpu_device *adev,
        if (ret)
                return ret;
 
-       fill_blending_from_plane_state(
+       amdgpu_dm_plane_fill_blending_from_plane_state(
                plane_state, &plane_info->per_pixel_alpha, &plane_info->pre_multiplied_alpha,
                &plane_info->global_alpha, &plane_info->global_alpha_value);
 
@@ -5006,7 +5006,7 @@ static int fill_dc_plane_attributes(struct amdgpu_device *adev,
        int ret;
        bool force_disable_dcc = false;
 
-       ret = fill_dc_scaling_info(adev, plane_state, &scaling_info);
+       ret = amdgpu_dm_plane_fill_dc_scaling_info(adev, plane_state, &scaling_info);
        if (ret)
                return ret;
 
@@ -7901,7 +7901,7 @@ static void amdgpu_dm_commit_cursors(struct drm_atomic_state *state)
         */
        for_each_old_plane_in_state(state, plane, old_plane_state, i)
                if (plane->type == DRM_PLANE_TYPE_CURSOR)
-                       handle_cursor_update(plane, old_plane_state);
+                       amdgpu_dm_plane_handle_cursor_update(plane, old_plane_state);
 }
 
 static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
@@ -7986,7 +7986,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
                        bundle->surface_updates[planes_count].gamut_remap_matrix = &dc_plane->gamut_remap_matrix;
                }
 
-               fill_dc_scaling_info(dm->adev, new_plane_state,
+               amdgpu_dm_plane_fill_dc_scaling_info(dm->adev, new_plane_state,
                                     &bundle->scaling_infos[planes_count]);
 
                bundle->surface_updates[planes_count].scaling_info =
@@ -9650,7 +9650,7 @@ static int dm_update_plane_state(struct dc *dc,
                if (!needs_reset)
                        return 0;
 
-               ret = dm_plane_helper_check_state(new_plane_state, new_crtc_state);
+               ret = amdgpu_dm_plane_helper_check_state(new_plane_state, new_crtc_state);
                if (ret)
                        return ret;
 

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
index a8d6b06cee95e7d7e7f0edcc4f3ceda78d65cfbb..32266897374792b30b6e474d1586dc9c413efd01 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
@@ -90,12 +90,12 @@ enum dm_micro_swizzle {
        MICRO_SWIZZLE_R = 3
 };
 
-const struct drm_format_info *amd_get_format_info(const struct drm_mode_fb_cmd2 *cmd)
+const struct drm_format_info *amdgpu_dm_plane_get_format_info(const struct drm_mode_fb_cmd2 *cmd)
 {
        return amdgpu_lookup_format_info(cmd->pixel_format, cmd->modifier[0]);
 }
 
-void fill_blending_from_plane_state(const struct drm_plane_state *plane_state,
+void amdgpu_dm_plane_fill_blending_from_plane_state(const struct drm_plane_state *plane_state,
                               bool *per_pixel_alpha, bool *pre_multiplied_alpha,
                               bool *global_alpha, int *global_alpha_value)
 {
@@ -741,7 +741,7 @@ static int get_plane_formats(const struct drm_plane *plane,
        return num_formats;
 }
 
-int fill_plane_buffer_attributes(struct amdgpu_device *adev,
+int amdgpu_dm_plane_fill_plane_buffer_attributes(struct amdgpu_device *adev,
                             const struct amdgpu_framebuffer *afb,
                             const enum surface_pixel_format format,
                             const enum dc_rotation_angle rotation,
@@ -900,7 +900,7 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane,
                        dm_plane_state_new->dc_state;
                bool force_disable_dcc = !plane_state->dcc.enable;
 
-               fill_plane_buffer_attributes(
+               amdgpu_dm_plane_fill_plane_buffer_attributes(
                        adev, afb, plane_state->format, plane_state->rotation,
                        afb->tiling_flags,
                        &plane_state->tiling_info, &plane_state->plane_size,
@@ -981,7 +981,7 @@ static void get_min_max_dc_plane_scaling(struct drm_device *dev,
                *min_downscale = 1000;
 }
 
-int dm_plane_helper_check_state(struct drm_plane_state *state,
+int amdgpu_dm_plane_helper_check_state(struct drm_plane_state *state,
                                       struct drm_crtc_state *new_crtc_state)
 {
        struct drm_framebuffer *fb = state->fb;
@@ -1035,7 +1035,7 @@ int dm_plane_helper_check_state(struct drm_plane_state *state,
                state, new_crtc_state, min_scale, max_scale, true, true);
 }
 
-int fill_dc_scaling_info(struct amdgpu_device *adev,
+int amdgpu_dm_plane_fill_dc_scaling_info(struct amdgpu_device *adev,
                                const struct drm_plane_state *state,
                                struct dc_scaling_info *scaling_info)
 {
@@ -1143,11 +1143,11 @@ static int dm_plane_atomic_check(struct drm_plane *plane,
        if (!new_crtc_state)
                return -EINVAL;
 
-       ret = dm_plane_helper_check_state(new_plane_state, new_crtc_state);
+       ret = amdgpu_dm_plane_helper_check_state(new_plane_state, new_crtc_state);
        if (ret)
                return ret;
 
-       ret = fill_dc_scaling_info(adev, new_plane_state, &scaling_info);
+       ret = amdgpu_dm_plane_fill_dc_scaling_info(adev, new_plane_state, &scaling_info);
        if (ret)
                return ret;
 
@@ -1211,7 +1211,7 @@ static int get_cursor_position(struct drm_plane *plane, struct drm_crtc *crtc,
        return 0;
 }
 
-void handle_cursor_update(struct drm_plane *plane,
+void amdgpu_dm_plane_handle_cursor_update(struct drm_plane *plane,
                                 struct drm_plane_state *old_plane_state)
 {
        struct amdgpu_device *adev = drm_to_adev(plane->dev);
@@ -1296,7 +1296,7 @@ static void dm_plane_atomic_async_update(struct drm_plane *plane,
        plane->state->crtc_w = new_state->crtc_w;
        plane->state->crtc_h = new_state->crtc_h;
 
-       handle_cursor_update(plane, old_state);
+       amdgpu_dm_plane_handle_cursor_update(plane, old_state);
 }
 
 static const struct drm_plane_helper_funcs dm_plane_helper_funcs = {

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h
index a4bee8528a51b2b335928e7c7eda3a9d2fdb2f85..930f1572f8983739cbad69266d1d412af1f6fc00 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.h
@@ -29,17 +29,17 @@
 
 #include "dc.h"
 
-void handle_cursor_update(struct drm_plane *plane,
+void amdgpu_dm_plane_handle_cursor_update(struct drm_plane *plane,
                          struct drm_plane_state *old_plane_state);
 
-int fill_dc_scaling_info(struct amdgpu_device *adev,
+int amdgpu_dm_plane_fill_dc_scaling_info(struct amdgpu_device *adev,
                         const struct drm_plane_state *state,
                         struct dc_scaling_info *scaling_info);
 
-int dm_plane_helper_check_state(struct drm_plane_state *state,
+int amdgpu_dm_plane_helper_check_state(struct drm_plane_state *state,
                                struct drm_crtc_state *new_crtc_state);
 
-int fill_plane_buffer_attributes(struct amdgpu_device *adev,
+int amdgpu_dm_plane_fill_plane_buffer_attributes(struct amdgpu_device *adev,
                                 const struct amdgpu_framebuffer *afb,
                                 const enum surface_pixel_format format,
                                 const enum dc_rotation_angle rotation,
@@ -56,9 +56,9 @@ int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
                         unsigned long possible_crtcs,
                         const struct dc_plane_cap *plane_cap);
 
-const struct drm_format_info *amd_get_format_info(const struct drm_mode_fb_cmd2 *cmd);
+const struct drm_format_info *amdgpu_dm_plane_get_format_info(const struct drm_mode_fb_cmd2 *cmd);
 
-void fill_blending_from_plane_state(const struct drm_plane_state *plane_state,
+void amdgpu_dm_plane_fill_blending_from_plane_state(const struct drm_plane_state *plane_state,
                                    bool *per_pixel_alpha, bool *pre_multiplied_alpha,
                                    bool *global_alpha, int *global_alpha_value);