switch (ch_num) {
        case ACP_TO_I2S_DMA_CH_NUM:
        case ACP_TO_SYSRAM_CH_NUM:
-       case I2S_TO_ACP_DMA_CH_NUM:
        case ACP_TO_I2S_DMA_BT_INSTANCE_CH_NUM:
        case ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM:
-       case I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM:
                dma_ctrl |= ACP_DMA_CNTL_0__DMAChIOCEn_MASK;
                break;
        default:
                              acp_mmio, mmACP_EXTERNAL_INTR_STAT);
        }
 
-       if ((intr_flag & BIT(I2S_TO_ACP_DMA_CH_NUM)) != 0) {
-               valid_irq = true;
-               acp_reg_write((intr_flag & BIT(I2S_TO_ACP_DMA_CH_NUM)) << 16,
-                             acp_mmio, mmACP_EXTERNAL_INTR_STAT);
-       }
-
        if ((intr_flag & BIT(ACP_TO_SYSRAM_BT_INSTANCE_CH_NUM)) != 0) {
                valid_irq = true;
                snd_pcm_period_elapsed(irq_data->capture_i2sbt_stream);
                              acp_mmio, mmACP_EXTERNAL_INTR_STAT);
        }
 
-       if ((intr_flag & BIT(I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM)) != 0) {
-               valid_irq = true;
-               acp_reg_write((intr_flag &
-                             BIT(I2S_TO_ACP_DMA_BT_INSTANCE_CH_NUM)) << 16,
-                             acp_mmio, mmACP_EXTERNAL_INTR_STAT);
-       }
-
        if (valid_irq)
                return IRQ_HANDLED;
        else