sh_eth: fix TRSCER mask for SH771x
authorSergey Shtylyov <s.shtylyov@omprussia.ru>
Sun, 28 Feb 2021 20:25:43 +0000 (23:25 +0300)
committerDavid S. Miller <davem@davemloft.net>
Mon, 1 Mar 2021 21:22:34 +0000 (13:22 -0800)
According  to  the SH7710, SH7712, SH7713 Group User's Manual: Hardware,
Rev. 3.00, the TRSCER register actually has only bit 7 valid (and named
differently), with all the other bits reserved. Apparently, this was not
the case with some early revisions of the manual as we have the other
bits declared (and set) in the original driver.  Follow the suit and add
the explicit sh_eth_cpu_data::trscer_err_mask initializer for SH771x...

Fixes: 86a74ff21a7a ("net: sh_eth: add support for Renesas SuperH Ethernet")
Signed-off-by: Sergey Shtylyov <s.shtylyov@omprussia.ru>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/renesas/sh_eth.c

index 590b088bc4c7f3e2f0d6d79443fcff6a6f4da077..e79bb0a3ced5279659cb8192eb1133be028f0f6e 100644 (file)
@@ -1089,6 +1089,9 @@ static struct sh_eth_cpu_data sh771x_data = {
                          EESIPR_CEEFIP | EESIPR_CELFIP |
                          EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
                          EESIPR_PREIP | EESIPR_CERFIP,
+
+       .trscer_err_mask = DESC_I_RINT8,
+
        .tsu            = 1,
        .dual_port      = 1,
 };