ARM: dts: sunxi: Use constants for RTC clock indexes

The binding header provides descriptive names for the RTC clock indexes,
since the indexes were arbitrarily chosen by the binding, not by the
hardware. Let's use the names, so the meaning is clearer.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220607012438.18183-1-samuel@sholland.org

diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 715d748544499e5300d27155d02156630e478c89..70e634b37aae0a840d0f141bad83b17d07ba9761 100644 (file)
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -46,6 +46,7 @@
 #include <dt-bindings/thermal/thermal.h>
 
 #include <dt-bindings/clock/sun6i-a31-ccu.h>
+#include <dt-bindings/clock/sun6i-rtc.h>
 #include <dt-bindings/reset/sun6i-a31-ccu.h>
 
 / {
@@ -598,7 +599,7 @@
                ccu: clock@1c20000 {
                        compatible = "allwinner,sun6i-a31-ccu";
                        reg = <0x01c20000 0x400>;
-                       clocks = <&osc24M>, <&rtc 0>;
+                       clocks = <&osc24M>, <&rtc CLK_OSC32K>;
                        clock-names = "hosc", "losc";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
@@ -612,7 +613,8 @@
                                     <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_APB1_PIO>, <&osc24M>, <&rtc 0>;
+                       clocks = <&ccu CLK_APB1_PIO>, <&osc24M>,
+                                <&rtc CLK_OSC32K>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
@@ -1319,7 +1321,7 @@
                        ar100: ar100_clk {
                                compatible = "allwinner,sun6i-a31-ar100-clk";
                                #clock-cells = <0>;
-                               clocks = <&rtc 0>, <&osc24M>,
+                               clocks = <&rtc CLK_OSC32K>, <&osc24M>,
                                         <&ccu CLK_PLL_PERIPH>,
                                         <&ccu CLK_PLL_PERIPH>;
                                clock-output-names = "ar100";
@@ -1354,7 +1356,7 @@
                        ir_clk: ir_clk {
                                #clock-cells = <0>;
                                compatible = "allwinner,sun4i-a10-mod0-clk";
-                               clocks = <&rtc 0>, <&osc24M>;
+                               clocks = <&rtc CLK_OSC32K>, <&osc24M>;
                                clock-output-names = "ir";
                        };
 
@@ -1385,7 +1387,7 @@
                        interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;
+                       clocks = <&apb0_gates 0>, <&osc24M>, <&rtc CLK_OSC32K>;
                        clock-names = "apb", "hosc", "losc";
                        resets = <&apb0_rst 0>;
                        gpio-controller;

diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 4461d5098b20b7c423a67af3519c6733bfcd3e86..1a262a05fdcb25c05781e925fb1005dbccc7a53c 100644 (file)
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -44,6 +44,7 @@
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
+#include <dt-bindings/clock/sun6i-rtc.h>
 #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
 #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
 
@@ -329,7 +330,7 @@
 
                ccu: clock@1c20000 {
                        reg = <0x01c20000 0x400>;
-                       clocks = <&osc24M>, <&rtc 0>;
+                       clocks = <&osc24M>, <&rtc CLK_OSC32K>;
                        clock-names = "hosc", "losc";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
@@ -340,7 +341,8 @@
                        reg = <0x01c20800 0x400>;
                        interrupt-parent = <&r_intc>;
                        /* interrupts get set in SoC specific dtsi file */
-                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
+                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>,
+                                <&rtc CLK_OSC32K>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
@@ -810,7 +812,7 @@
                        reg = <0x01f02c00 0x400>;
                        interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;
+                       clocks = <&apb0_gates 0>, <&osc24M>, <&rtc CLK_OSC32K>;
                        clock-names = "apb", "hosc", "losc";
                        resets = <&apb0_rst 0>;
                        gpio-controller;

diff --git a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
index d5c7b7984d857f260984f51074e4484bd066bd70..c06b217a8af5f4ce383e06f161779cb4d0147e75 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
+++ b/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
@@ -106,7 +106,7 @@
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "ext_clock";
        };
 };
@@ -181,7 +181,7 @@
        bluetooth {
                compatible = "brcm,bcm43438-bt";
                max-speed = <1500000>;
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "lpo";
                vbat-supply = <&reg_vcc3v3>;
                vddio-supply = <&reg_vcc3v3>;

diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
index cd9f655e4f9240b81a5cba8a5de8123fd5df6507..7721a7a50d455dc43ec1c4e652b942c34421571e 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
@@ -125,7 +125,7 @@
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "ext_clock";
        };
 };

diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts
index 8e7dfcffe1fbe471a1e694bb1a32d5b52f9f0646..23aae3eaed79be3d6f05da2b2913af286e3fa350 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-duo2.dts
@@ -90,7 +90,7 @@
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "ext_clock";
        };
 
@@ -151,7 +151,7 @@
 
        bluetooth {
                compatible = "brcm,bcm43438-bt";
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "lpo";
                vbat-supply = <&reg_vcc3v3>;
                vddio-supply = <&reg_vcc3v3>;

diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
index cd3df12b6573be7ed58c569c74d27ae345e39f22..9e1a33f94cadc58a56e3bb92b6bcdda8341d830b 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
@@ -127,7 +127,7 @@
 
        bluetooth {
                compatible = "brcm,bcm43438-bt";
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "lpo";
                vbat-supply = <&reg_vcc3v3>;
                vddio-supply = <&reg_vcc3v3>;

diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
index 26e2e6172e0dc52bd5890a4771eea6bf55483500..42cd1131adf3d098fb434c9e4126a6d88d870db1 100644 (file)
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-r1.dts
@@ -46,7 +46,7 @@
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "ext_clock";
        };
 
@@ -147,7 +147,7 @@
 
        bluetooth {
                compatible = "brcm,bcm43438-bt";
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "lpo";
                vbat-supply = <&reg_vcc3v3>;
                vddio-supply = <&reg_vcc3v3>;

diff --git a/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts b/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts
index bf5b5e2f6168beefaef40d67e25c9befae73ce85..bc394686fedbb8fc8c9c514113eebb30c940b052 100644 (file)
--- a/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts
+++ b/arch/arm/boot/dts/sun8i-r16-bananapi-m2m.dts
@@ -91,7 +91,7 @@
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                reset-gpios = <&r_pio 0 6 GPIO_ACTIVE_LOW>; /* PL06 */
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "ext_clock";
        };
 };
@@ -283,7 +283,7 @@
 
        bluetooth {
                compatible = "brcm,bcm43438-bt";
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "lpo";
                vbat-supply = <&reg_dldo1>;
                vddio-supply = <&reg_aldo3>;

diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 03d3e5f45a0909c02448b870090dfff3d9ae2f46..75d55a46b50e8ca182b1fc9304a4760d00152ec9 100644 (file)
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -42,6 +42,7 @@
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/sun6i-rtc.h>
 #include <dt-bindings/clock/sun8i-de2.h>
 #include <dt-bindings/clock/sun8i-r40-ccu.h>
 #include <dt-bindings/clock/sun8i-tcon-top.h>
@@ -485,7 +486,7 @@
                ccu: clock@1c20000 {
                        compatible = "allwinner,sun8i-r40-ccu";
                        reg = <0x01c20000 0x400>;
-                       clocks = <&osc24M>, <&rtc 0>;
+                       clocks = <&osc24M>, <&rtc CLK_OSC32K>;
                        clock-names = "hosc", "losc";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
@@ -504,7 +505,8 @@
                        compatible = "allwinner,sun8i-r40-pinctrl";
                        reg = <0x01c20800 0x400>;
                        interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
+                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>,
+                                <&rtc CLK_OSC32K>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        interrupt-controller;
@@ -1231,7 +1233,7 @@
                        reg-io-width = <1>;
                        interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&ccu CLK_BUS_HDMI0>, <&ccu CLK_HDMI_SLOW>,
-                                <&ccu CLK_HDMI>, <&rtc 0>;
+                                <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>;
                        clock-names = "iahb", "isfr", "tmds", "cec";
                        resets = <&ccu RST_BUS_HDMI1>;
                        reset-names = "ctrl";

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 084323d5c61cb03c7e882c29dc21f298e77058bc..db194c606fdcdf48bb7d13c9ca5de0042cd8a69b 100644 (file)
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -42,6 +42,7 @@
  */
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/sun6i-rtc.h>
 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
 #include <dt-bindings/clock/sun8i-de2.h>
@@ -321,7 +322,7 @@
                ccu: clock@1c20000 {
                        compatible = "allwinner,sun8i-v3s-ccu";
                        reg = <0x01c20000 0x400>;
-                       clocks = <&osc24M>, <&rtc 0>;
+                       clocks = <&osc24M>, <&rtc CLK_OSC32K>;
                        clock-names = "hosc", "losc";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
@@ -342,7 +343,8 @@
                        reg = <0x01c20800 0x400>;
                        interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
+                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>,
+                                <&rtc CLK_OSC32K>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;

diff --git a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
index d03f5853ef7bf83e199df7db5d48045d1ba92886..d4627bc7c122596f557785f1f4dcd8695bce4461 100644 (file)
--- a/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
+++ b/arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi
@@ -101,7 +101,7 @@
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "ext_clock";
        };
 };
@@ -221,7 +221,7 @@
        bluetooth {
                compatible = "brcm,bcm43438-bt";
                max-speed = <1500000>;
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "lpo";
                vbat-supply = <&reg_vcc3v3>;
                vddio-supply = <&reg_vcc3v3>;

diff --git a/arch/arm/boot/dts/sunxi-h3-h5-emlid-neutis.dtsi b/arch/arm/boot/dts/sunxi-h3-h5-emlid-neutis.dtsi
index fc67e30fe2129964675203977f9492f4052460d5..60804b0e6c56a62f9049f4a51354747b0d195b26 100644 (file)
--- a/arch/arm/boot/dts/sunxi-h3-h5-emlid-neutis.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5-emlid-neutis.dtsi
@@ -22,7 +22,7 @@
                compatible = "mmc-pwrseq-simple";
                reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */
                post-power-on-delay-ms = <200>;
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "ext_clock";
        };
 };
@@ -124,7 +124,7 @@
 
        bluetooth {
                compatible = "brcm,bcm43438-bt";
-               clocks = <&rtc 1>;
+               clocks = <&rtc CLK_OSC32K_FANOUT>;
                clock-names = "lpo";
                vbat-supply = <&reg_vcc3v3>;
                vddio-supply = <&reg_vcc3v3>;

diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index d7e9f977f986840a512624fbf2b0e1427edb9904..09aefb4e90f855629f96572a6df0e95672649d7b 100644 (file)
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -40,6 +40,7 @@
  *     OTHER DEALINGS IN THE SOFTWARE.
  */
 
+#include <dt-bindings/clock/sun6i-rtc.h>
 #include <dt-bindings/clock/sun8i-de2.h>
 #include <dt-bindings/clock/sun8i-h3-ccu.h>
 #include <dt-bindings/clock/sun8i-r-ccu.h>
@@ -386,7 +387,7 @@
                ccu: clock@1c20000 {
                        /* compatible is in per SoC .dtsi file */
                        reg = <0x01c20000 0x400>;
-                       clocks = <&osc24M>, <&rtc 0>;
+                       clocks = <&osc24M>, <&rtc CLK_OSC32K>;
                        clock-names = "hosc", "losc";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
@@ -398,7 +399,8 @@
                        interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
+                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>,
+                                <&rtc CLK_OSC32K>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;
@@ -818,7 +820,7 @@
                        reg-io-width = <1>;
                        interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
                        clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
-                                <&ccu CLK_HDMI>, <&rtc 0>;
+                                <&ccu CLK_HDMI>, <&rtc CLK_OSC32K>;
                        clock-names = "iahb", "isfr", "tmds", "cec";
                        resets = <&ccu RST_BUS_HDMI1>;
                        reset-names = "ctrl";
@@ -878,7 +880,7 @@
                r_ccu: clock@1f01400 {
                        compatible = "allwinner,sun8i-h3-r-ccu";
                        reg = <0x01f01400 0x100>;
-                       clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
+                       clocks = <&osc24M>, <&rtc CLK_OSC32K>, <&rtc CLK_IOSC>,
                                 <&ccu CLK_PLL_PERIPH0>;
                        clock-names = "hosc", "losc", "iosc", "pll-periph";
                        #clock-cells = <1>;
@@ -931,7 +933,8 @@
                        reg = <0x01f02c00 0x400>;
                        interrupt-parent = <&r_intc>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>;
+                       clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>,
+                                <&rtc CLK_OSC32K>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;