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arm64: dts: qcom: sdm670: add osm l3
author
Richard Acayan
<mailingradian@gmail.com>
Wed, 2 Aug 2023 01:15:50 +0000
(21:15 -0400)
committer
Bjorn Andersson
<andersson@kernel.org>
Fri, 4 Aug 2023 03:47:09 +0000
(20:47 -0700)
Add the interconnect node for L3 cache on SDM670.
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link:
https://lore.kernel.org/r/20230802011548.387519-8-mailingradian@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arch/arm64/boot/dts/qcom/sdm670.dtsi
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diff --git
a/arch/arm64/boot/dts/qcom/sdm670.dtsi
b/arch/arm64/boot/dts/qcom/sdm670.dtsi
index a1c207c0266dab6242a3d8c56b15677288115682..45f9633d2d2cd19fd84a41900d35d33b5da40216 100644
(file)
--- a/
arch/arm64/boot/dts/qcom/sdm670.dtsi
+++ b/
arch/arm64/boot/dts/qcom/sdm670.dtsi
@@
-1354,5
+1354,15
@@
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <3>;
};
+
+ osm_l3: interconnect@17d41000 {
+ compatible = "qcom,sdm670-osm-l3", "qcom,osm-l3";
+ reg = <0 0x17d41000 0 0x1400>;
+
+ clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
+ clock-names = "xo", "alternate";
+
+ #interconnect-cells = <1>;
+ };
};
};