x86/trapnr: Add event type macros to <asm/trapnr.h>

Intel VT-x classifies events into eight different types, which is inherited
by FRED for event identification. As such, event types becomes a common x86
concept, and should be defined in a common x86 header.

Add event type macros to <asm/trapnr.h>, and use them in <asm/vmx.h>.

Suggested-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Signed-off-by: Xin Li <xin3.li@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Shan Kang <shan.kang@intel.com>
Link: https://lore.kernel.org/r/20231205105030.8698-4-xin3.li@intel.com

diff --git a/arch/x86/include/asm/trapnr.h b/arch/x86/include/asm/trapnr.h
index f5d2325aa0b749db0b6743adb85c94cb0f303624..8d1154cdf7875c923645e3b5f5bf111ce9ffd1f0 100644 (file)
--- a/arch/x86/include/asm/trapnr.h
+++ b/arch/x86/include/asm/trapnr.h
@@ -2,6 +2,18 @@
 #ifndef _ASM_X86_TRAPNR_H
 #define _ASM_X86_TRAPNR_H
 
+/*
+ * Event type codes used by FRED, Intel VT-x and AMD SVM
+ */
+#define EVENT_TYPE_EXTINT      0       // External interrupt
+#define EVENT_TYPE_RESERVED    1
+#define EVENT_TYPE_NMI         2       // NMI
+#define EVENT_TYPE_HWEXC       3       // Hardware originated traps, exceptions
+#define EVENT_TYPE_SWINT       4       // INT n
+#define EVENT_TYPE_PRIV_SWEXC  5       // INT1
+#define EVENT_TYPE_SWEXC       6       // INTO, INT3
+#define EVENT_TYPE_OTHER       7       // FRED SYSCALL/SYSENTER, VT-x MTF
+
 /* Interrupts/Exceptions */
 
 #define X86_TRAP_DE             0      /* Divide-by-zero */

diff --git a/arch/x86/include/asm/vmx.h b/arch/x86/include/asm/vmx.h
index 0e73616b82f3469f47877e0cc56ca6b79f034173..4dba173630084f88cabc20216b03ed9c86a1a072 100644 (file)
--- a/arch/x86/include/asm/vmx.h
+++ b/arch/x86/include/asm/vmx.h
@@ -17,6 +17,7 @@
 #include <linux/types.h>
 
 #include <uapi/asm/vmx.h>
+#include <asm/trapnr.h>
 #include <asm/vmxfeatures.h>
 
 #define VMCS_CONTROL_BIT(x)    BIT(VMX_FEATURE_##x & 0x1f)
@@ -374,14 +375,14 @@ enum vmcs_field {
 #define VECTORING_INFO_DELIVER_CODE_MASK       INTR_INFO_DELIVER_CODE_MASK
 #define VECTORING_INFO_VALID_MASK              INTR_INFO_VALID_MASK
 
-#define INTR_TYPE_EXT_INTR              (0 << 8) /* external interrupt */
-#define INTR_TYPE_RESERVED              (1 << 8) /* reserved */
-#define INTR_TYPE_NMI_INTR             (2 << 8) /* NMI */
-#define INTR_TYPE_HARD_EXCEPTION       (3 << 8) /* processor exception */
-#define INTR_TYPE_SOFT_INTR             (4 << 8) /* software interrupt */
-#define INTR_TYPE_PRIV_SW_EXCEPTION    (5 << 8) /* ICE breakpoint - undocumented */
-#define INTR_TYPE_SOFT_EXCEPTION       (6 << 8) /* software exception */
-#define INTR_TYPE_OTHER_EVENT           (7 << 8) /* other event */
+#define INTR_TYPE_EXT_INTR             (EVENT_TYPE_EXTINT << 8)        /* external interrupt */
+#define INTR_TYPE_RESERVED             (EVENT_TYPE_RESERVED << 8)      /* reserved */
+#define INTR_TYPE_NMI_INTR             (EVENT_TYPE_NMI << 8)           /* NMI */
+#define INTR_TYPE_HARD_EXCEPTION       (EVENT_TYPE_HWEXC << 8)         /* processor exception */
+#define INTR_TYPE_SOFT_INTR            (EVENT_TYPE_SWINT << 8)         /* software interrupt */
+#define INTR_TYPE_PRIV_SW_EXCEPTION    (EVENT_TYPE_PRIV_SWEXC << 8)    /* ICE breakpoint */
+#define INTR_TYPE_SOFT_EXCEPTION       (EVENT_TYPE_SWEXC << 8)         /* software exception */
+#define INTR_TYPE_OTHER_EVENT          (EVENT_TYPE_OTHER << 8)         /* other event */
 
 /* GUEST_INTERRUPTIBILITY_INFO flags. */
 #define GUEST_INTR_STATE_STI           0x00000001