arm64: dts: meson: g12a: add cooling properties
authorGuillaume La Roque <glaroque@baylibre.com>
Fri, 4 Oct 2019 09:01:12 +0000 (11:01 +0200)
committerKevin Hilman <khilman@baylibre.com>
Thu, 17 Oct 2019 16:12:51 +0000 (09:12 -0700)
Add missing #colling-cells field for G12A SoC
Add cooling-map for passive and hot trip point

Tested-by: Christian Hewitt <christianshewitt@gmail.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi

index 07450c4babfc63d880a08c3e3578370a5c9daff9..fb0ab27d1f642dbe5e7100f737ea64b7a69d5eb1 100644 (file)
@@ -18,6 +18,7 @@
                        reg = <0x0 0x0>;
                        enable-method = "psci";
                        next-level-cache = <&l2>;
+                       #cooling-cells = <2>;
                };
 
                cpu1: cpu@1 {
@@ -26,6 +27,7 @@
                        reg = <0x0 0x1>;
                        enable-method = "psci";
                        next-level-cache = <&l2>;
+                       #cooling-cells = <2>;
                };
 
                cpu2: cpu@2 {
@@ -34,6 +36,7 @@
                        reg = <0x0 0x2>;
                        enable-method = "psci";
                        next-level-cache = <&l2>;
+                       #cooling-cells = <2>;
                };
 
                cpu3: cpu@3 {
@@ -42,6 +45,7 @@
                        reg = <0x0 0x3>;
                        enable-method = "psci";
                        next-level-cache = <&l2>;
+                       #cooling-cells = <2>;
                };
 
                l2: l2-cache0 {
                };
        };
 };
+
+&cpu_thermal {
+       cooling-maps {
+               map0 {
+                       trip = <&cpu_passive>;
+                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                       <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                       <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                       <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+               };
+
+               map1 {
+                       trip = <&cpu_hot>;
+                       cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                       <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                       <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+                                       <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+               };
+       };
+};