drm/i915: determine lmem_size properly

Determine lmem_size using ADDR_RANGE register so that lmem_setup()
works on platform with small-bar as well.

Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220511153746.14142-2-nirmoy.das@intel.com

diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index 5a7c403d718afc14def084efaec956e3779cdca5..cd105ec104299d96368430606799652a50f3a128 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -101,9 +101,13 @@ static struct intel_memory_region *setup_lmem(struct intel_gt *gt)
                return ERR_PTR(-ENODEV);
 
        if (HAS_FLAT_CCS(i915)) {
+               resource_size_t lmem_range;
                u64 tile_stolen, flat_ccs_base;
 
-               lmem_size = pci_resource_len(pdev, 2);
+               lmem_range = intel_gt_read_register(&i915->gt0, XEHPSDV_TILE0_ADDR_RANGE) & 0xFFFF;
+               lmem_size = lmem_range >> XEHPSDV_TILE_LMEM_RANGE_SHIFT;
+               lmem_size *= SZ_1G;
+
                flat_ccs_base = intel_gt_read_register(gt, XEHPSDV_FLAT_CCS_BASE_ADDR);
                flat_ccs_base = (flat_ccs_base >> XEHPSDV_CCS_BASE_SHIFT) * SZ_64K;