*        * AMD:   [0 .. AMD64_NUM_COUNTERS-1] <=> gp counters
  */
 
+static struct kvm_pmu_ops kvm_pmu_ops __read_mostly;
+
+void kvm_pmu_ops_update(const struct kvm_pmu_ops *pmu_ops)
+{
+       memcpy(&kvm_pmu_ops, pmu_ops, sizeof(kvm_pmu_ops));
+}
+
+static inline bool pmc_is_enabled(struct kvm_pmc *pmc)
+{
+       return kvm_pmu_ops.pmc_is_enabled(pmc);
+}
+
 static void kvm_pmi_trigger_fn(struct irq_work *irq_work)
 {
        struct kvm_pmu *pmu = container_of(irq_work, struct kvm_pmu, irq_work);
                          ARCH_PERFMON_EVENTSEL_CMASK |
                          HSW_IN_TX |
                          HSW_IN_TX_CHECKPOINTED))) {
-               config = kvm_x86_ops.pmu_ops->pmc_perf_hw_id(pmc);
+               config = kvm_pmu_ops.pmc_perf_hw_id(pmc);
                if (config != PERF_COUNT_HW_MAX)
                        type = PERF_TYPE_HARDWARE;
        }
 
        pmc->current_config = (u64)ctrl;
        pmc_reprogram_counter(pmc, PERF_TYPE_HARDWARE,
-                             kvm_x86_ops.pmu_ops->pmc_perf_hw_id(pmc),
+                             kvm_pmu_ops.pmc_perf_hw_id(pmc),
                              !(en_field & 0x2), /* exclude user */
                              !(en_field & 0x1), /* exclude kernel */
                              pmi);
 
 void reprogram_counter(struct kvm_pmu *pmu, int pmc_idx)
 {
-       struct kvm_pmc *pmc = kvm_x86_ops.pmu_ops->pmc_idx_to_pmc(pmu, pmc_idx);
+       struct kvm_pmc *pmc = kvm_pmu_ops.pmc_idx_to_pmc(pmu, pmc_idx);
 
        if (!pmc)
                return;
        int bit;
 
        for_each_set_bit(bit, pmu->reprogram_pmi, X86_PMC_IDX_MAX) {
-               struct kvm_pmc *pmc = kvm_x86_ops.pmu_ops->pmc_idx_to_pmc(pmu, bit);
+               struct kvm_pmc *pmc = kvm_pmu_ops.pmc_idx_to_pmc(pmu, bit);
 
                if (unlikely(!pmc || !pmc->perf_event)) {
                        clear_bit(bit, pmu->reprogram_pmi);
 /* check if idx is a valid index to access PMU */
 bool kvm_pmu_is_valid_rdpmc_ecx(struct kvm_vcpu *vcpu, unsigned int idx)
 {
-       return kvm_x86_ops.pmu_ops->is_valid_rdpmc_ecx(vcpu, idx);
+       return kvm_pmu_ops.is_valid_rdpmc_ecx(vcpu, idx);
 }
 
 bool is_vmware_backdoor_pmc(u32 pmc_idx)
        if (is_vmware_backdoor_pmc(idx))
                return kvm_pmu_rdpmc_vmware(vcpu, idx, data);
 
-       pmc = kvm_x86_ops.pmu_ops->rdpmc_ecx_to_pmc(vcpu, idx, &mask);
+       pmc = kvm_pmu_ops.rdpmc_ecx_to_pmc(vcpu, idx, &mask);
        if (!pmc)
                return 1;
 
 void kvm_pmu_deliver_pmi(struct kvm_vcpu *vcpu)
 {
        if (lapic_in_kernel(vcpu)) {
-               if (kvm_x86_ops.pmu_ops->deliver_pmi)
-                       kvm_x86_ops.pmu_ops->deliver_pmi(vcpu);
+               if (kvm_pmu_ops.deliver_pmi)
+                       kvm_pmu_ops.deliver_pmi(vcpu);
                kvm_apic_local_deliver(vcpu->arch.apic, APIC_LVTPC);
        }
 }
 
 bool kvm_pmu_is_valid_msr(struct kvm_vcpu *vcpu, u32 msr)
 {
-       return kvm_x86_ops.pmu_ops->msr_idx_to_pmc(vcpu, msr) ||
-               kvm_x86_ops.pmu_ops->is_valid_msr(vcpu, msr);
+       return kvm_pmu_ops.msr_idx_to_pmc(vcpu, msr) ||
+               kvm_pmu_ops.is_valid_msr(vcpu, msr);
 }
 
 static void kvm_pmu_mark_pmc_in_use(struct kvm_vcpu *vcpu, u32 msr)
 {
        struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
-       struct kvm_pmc *pmc = kvm_x86_ops.pmu_ops->msr_idx_to_pmc(vcpu, msr);
+       struct kvm_pmc *pmc = kvm_pmu_ops.msr_idx_to_pmc(vcpu, msr);
 
        if (pmc)
                __set_bit(pmc->idx, pmu->pmc_in_use);
 
 int kvm_pmu_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 {
-       return kvm_x86_ops.pmu_ops->get_msr(vcpu, msr_info);
+       return kvm_pmu_ops.get_msr(vcpu, msr_info);
 }
 
 int kvm_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 {
        kvm_pmu_mark_pmc_in_use(vcpu, msr_info->index);
-       return kvm_x86_ops.pmu_ops->set_msr(vcpu, msr_info);
+       return kvm_pmu_ops.set_msr(vcpu, msr_info);
 }
 
 /* refresh PMU settings. This function generally is called when underlying
  */
 void kvm_pmu_refresh(struct kvm_vcpu *vcpu)
 {
-       kvm_x86_ops.pmu_ops->refresh(vcpu);
+       kvm_pmu_ops.refresh(vcpu);
 }
 
 void kvm_pmu_reset(struct kvm_vcpu *vcpu)
        struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
 
        irq_work_sync(&pmu->irq_work);
-       kvm_x86_ops.pmu_ops->reset(vcpu);
+       kvm_pmu_ops.reset(vcpu);
 }
 
 void kvm_pmu_init(struct kvm_vcpu *vcpu)
        struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
 
        memset(pmu, 0, sizeof(*pmu));
-       kvm_x86_ops.pmu_ops->init(vcpu);
+       kvm_pmu_ops.init(vcpu);
        init_irq_work(&pmu->irq_work, kvm_pmi_trigger_fn);
        pmu->event_count = 0;
        pmu->need_cleanup = false;
                      pmu->pmc_in_use, X86_PMC_IDX_MAX);
 
        for_each_set_bit(i, bitmask, X86_PMC_IDX_MAX) {
-               pmc = kvm_x86_ops.pmu_ops->pmc_idx_to_pmc(pmu, i);
+               pmc = kvm_pmu_ops.pmc_idx_to_pmc(pmu, i);
 
                if (pmc && pmc->perf_event && !pmc_speculative_in_use(pmc))
                        pmc_stop_counter(pmc);
        }
 
-       if (kvm_x86_ops.pmu_ops->cleanup)
-               kvm_x86_ops.pmu_ops->cleanup(vcpu);
+       if (kvm_pmu_ops.cleanup)
+               kvm_pmu_ops.cleanup(vcpu);
 
        bitmap_zero(pmu->pmc_in_use, X86_PMC_IDX_MAX);
 }
        unsigned int config;
 
        pmc->eventsel &= (ARCH_PERFMON_EVENTSEL_EVENT | ARCH_PERFMON_EVENTSEL_UMASK);
-       config = kvm_x86_ops.pmu_ops->pmc_perf_hw_id(pmc);
+       config = kvm_pmu_ops.pmc_perf_hw_id(pmc);
        pmc->eventsel = old_eventsel;
        return config == perf_hw_id;
 }
        int i;
 
        for_each_set_bit(i, pmu->all_valid_pmc_idx, X86_PMC_IDX_MAX) {
-               pmc = kvm_x86_ops.pmu_ops->pmc_idx_to_pmc(pmu, i);
+               pmc = kvm_pmu_ops.pmc_idx_to_pmc(pmu, i);
 
                if (!pmc || !pmc_is_enabled(pmc) || !pmc_speculative_in_use(pmc))
                        continue;