target/arm: Remove duplicate 'plus1' function from Neon and SVE decode

The Neon and SVE decoders use private 'plus1' functions to implement
"add one" for the !function decoder syntax.  We have a generic
"plus_1" function in translate.h, so use that instead.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20210715095341.701-1-peter.maydell@linaro.org

diff --git a/target/arm/neon-ls.decode b/target/arm/neon-ls.decode
index 0a2a0e15db5494ddf073be2ecae26a1b641f2554..c5f364cbc00e502e71565674372737ace3c1af94 100644 (file)
--- a/target/arm/neon-ls.decode
+++ b/target/arm/neon-ls.decode
@@ -41,8 +41,8 @@ VLD_all_lanes  1111 0100 1 . 1 0 rn:4 .... 11 n:2 size:2 t:1 a:1 rm:4 \
                vd=%vd_dp
 
 # Neon load/store single structure to one lane
-%imm1_5_p1 5:1 !function=plus1
-%imm1_6_p1 6:1 !function=plus1
+%imm1_5_p1 5:1 !function=plus_1
+%imm1_6_p1 6:1 !function=plus_1
 
 VLDST_single   1111 0100 1 . l:1 0 rn:4 .... 00 n:2 reg_idx:3 align:1 rm:4 \
                vd=%vd_dp size=0 stride=1

diff --git a/target/arm/neon-shared.decode b/target/arm/neon-shared.decode
index df80e6ebf660adc47784a9b6325ff67d08462b6a..8e6bd0b61f04b3ece7402bc987fb46c709352e72 100644 (file)
--- a/target/arm/neon-shared.decode
+++ b/target/arm/neon-shared.decode
@@ -38,7 +38,7 @@
 # which is 0 for fp16 and 1 for fp32 into a MO_* constant.
 # (Note that this is the reverse of the sense of the 1-bit size
 # field in the 3same_fp Neon insns.)
-%vcadd_size    20:1 !function=plus1
+%vcadd_size    20:1 !function=plus_1
 
 VCMLA          1111 110 rot:2 . 1 . .... .... 1000 . q:1 . 0 .... \
                vm=%vm_dp vn=%vn_dp vd=%vd_dp size=%vcadd_size

diff --git a/target/arm/sve.decode b/target/arm/sve.decode
index a62c169f1a8a00c18c4a1f958eeab11bc49cf572..c60b9f0fec5170dc5b26a9f82e95aa65b245677c 100644 (file)
--- a/target/arm/sve.decode
+++ b/target/arm/sve.decode
@@ -22,7 +22,7 @@
 ###########################################################################
 # Named fields.  These are primarily for disjoint fields.
 
-%imm4_16_p1     16:4 !function=plus1
+%imm4_16_p1     16:4 !function=plus_1
 %imm6_22_5      22:1 5:5
 %imm7_22_16     22:2 16:5
 %imm8_16_10     16:5 10:3

diff --git a/target/arm/translate-neon.c b/target/arm/translate-neon.c
index a45616cb6315b13aa38031ec73238564677f352e..c53ab20fa48bb2e0d353dd452b0ad7ebd3bcca2f 100644 (file)
--- a/target/arm/translate-neon.c
+++ b/target/arm/translate-neon.c
@@ -28,11 +28,6 @@
 #include "translate.h"
 #include "translate-a32.h"
 
-static inline int plus1(DisasContext *s, int x)
-{
-    return x + 1;
-}
-
 static inline int neon_3same_fp_size(DisasContext *s, int x)
 {
     /* Convert 0==fp32, 1==fp16 into a MO_* value */

diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index 35d838aa068c4df39f53aa7c7ae0bbd3bc77c78a..bc91a641711cbd72fd6b69f0a581eaa6b1bc8db9 100644 (file)
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -70,11 +70,6 @@ static int tszimm_shl(DisasContext *s, int x)
     return x - (8 << tszimm_esz(s, x));
 }
 
-static inline int plus1(DisasContext *s, int x)
-{
-    return x + 1;
-}
-
 /* The SH bit is in bit 8.  Extract the low 8 and shift.  */
 static inline int expand_imm_sh8s(DisasContext *s, int x)
 {