clk: qcom: dispcc-sm8250: Add sc8180x support

The display clock controller in SC8180x is reused from SM8150, so add
the necessary compatible and wire up the driver to enable this.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210511041719.591969-1-bjorn.andersson@linaro.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
index 0cdf53f41f84c9073396bc50e7cdf9e349c3711c..6667261dc6658bd1adee1eda9565fb2847f736bd 100644 (file)
--- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml
@@ -20,6 +20,7 @@ description: |
 properties:
   compatible:
     enum:
+      - qcom,sc8180x-dispcc
       - qcom,sm8150-dispcc
       - qcom,sm8250-dispcc
 

diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c
index de09cd5c209f9378ccb70466d94111828cd0db6b..12ef6f1d5c6284fb27c70af6de1487b55b6a3a36 100644 (file)
--- a/drivers/clk/qcom/dispcc-sm8250.c
+++ b/drivers/clk/qcom/dispcc-sm8250.c
@@ -1037,6 +1037,7 @@ static const struct qcom_cc_desc disp_cc_sm8250_desc = {
 };
 
 static const struct of_device_id disp_cc_sm8250_match_table[] = {
+       { .compatible = "qcom,sc8180x-dispcc" },
        { .compatible = "qcom,sm8150-dispcc" },
        { .compatible = "qcom,sm8250-dispcc" },
        { }
@@ -1053,7 +1054,8 @@ static int disp_cc_sm8250_probe(struct platform_device *pdev)
 
        /* note: trion == lucid, except for the prepare() op */
        BUILD_BUG_ON(CLK_ALPHA_PLL_TYPE_TRION != CLK_ALPHA_PLL_TYPE_LUCID);
-       if (of_device_is_compatible(pdev->dev.of_node, "qcom,sm8150-dispcc")) {
+       if (of_device_is_compatible(pdev->dev.of_node, "qcom,sc8180x-dispcc") ||
+           of_device_is_compatible(pdev->dev.of_node, "qcom,sm8150-dispcc")) {
                disp_cc_pll0_config.config_ctl_hi_val = 0x00002267;
                disp_cc_pll0_config.config_ctl_hi1_val = 0x00000024;
                disp_cc_pll0_config.user_ctl_hi1_val = 0x000000D0;