arm64: dts: ti: k3-am65-main: Fix sdhci node properties
authorJudith Mendez <jm@ti.com>
Tue, 23 Apr 2024 15:17:28 +0000 (10:17 -0500)
committerNishanth Menon <nm@ti.com>
Mon, 29 Apr 2024 19:35:29 +0000 (14:35 -0500)
Update otap-del-sel properties as per datasheet [0].

Add missing clkbuf-sel and itap-del-sel values also as per
datasheet [0].

Move clkbuf-sel and ti,trm-icp above the otap-del-sel properties
so the sdhci nodes could be more uniform across platforms.

[0] https://www.ti.com/lit/ds/symlink/am6548.pdf

Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel values")
Fixes: d7600d070fb0 ("arm64: dts: ti: k3-am65-main: Add support for sdhci1")
Signed-off-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20240423151732.3541894-2-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
arch/arm64/boot/dts/ti/k3-am65-main.dtsi

index de5b1b20a6177c9f364ffd42a6f607e9fc57ca9e..7f26e5bd72a9b6b7145bd1a1861e8afb69c4b064 100644 (file)
                interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
                mmc-ddr-1_8v;
                mmc-hs200-1_8v;
+               ti,clkbuf-sel = <0x7>;
+               ti,trm-icp = <0x8>;
                ti,otap-del-sel-legacy = <0x0>;
                ti,otap-del-sel-mmc-hs = <0x0>;
                ti,otap-del-sel-sd-hs = <0x0>;
                ti,otap-del-sel-ddr50 = <0x5>;
                ti,otap-del-sel-ddr52 = <0x5>;
                ti,otap-del-sel-hs200 = <0x5>;
-               ti,otap-del-sel-hs400 = <0x0>;
-               ti,trm-icp = <0x8>;
+               ti,itap-del-sel-ddr52 = <0x0>;
                dma-coherent;
                status = "disabled";
        };
                clocks = <&k3_clks 48 0>, <&k3_clks 48 1>;
                clock-names = "clk_ahb", "clk_xin";
                interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
+               ti,clkbuf-sel = <0x7>;
+               ti,trm-icp = <0x8>;
                ti,otap-del-sel-legacy = <0x0>;
                ti,otap-del-sel-mmc-hs = <0x0>;
                ti,otap-del-sel-sd-hs = <0x0>;
-               ti,otap-del-sel-sdr12 = <0x0>;
-               ti,otap-del-sel-sdr25 = <0x0>;
+               ti,otap-del-sel-sdr12 = <0xf>;
+               ti,otap-del-sel-sdr25 = <0xf>;
                ti,otap-del-sel-sdr50 = <0x8>;
                ti,otap-del-sel-sdr104 = <0x7>;
                ti,otap-del-sel-ddr50 = <0x4>;
                ti,otap-del-sel-ddr52 = <0x4>;
                ti,otap-del-sel-hs200 = <0x7>;
-               ti,clkbuf-sel = <0x7>;
-               ti,trm-icp = <0x8>;
+               ti,itap-del-sel-legacy = <0xa>;
+               ti,itap-del-sel-sd-hs = <0x1>;
+               ti,itap-del-sel-sdr12 = <0xa>;
+               ti,itap-del-sel-sdr25 = <0x1>;
                dma-coherent;
                status = "disabled";
        };