arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM

Some TLMM pins are wakeup-capable. Describe the relationship between
these two peripherals to enable this functionality.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230811-topic-tlmm_wakeup-v1-6-5616a7da1fff@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 8f66306d1de3fbcac2d1cb5a13151dae31aa83d6..8fd6f4d03490016c40269d7324bf671cd7a2a1d0 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -2261,6 +2261,7 @@
                        interrupt-controller;
                        #interrupt-cells = <2>;
                        gpio-ranges = <&tlmm 0 0 157>;
+                       wakeup-parent = <&pdc>;
 
                        cci0_default: cci0-default-state {
                                pins = "gpio39", "gpio40";