{ .compatible = "fsl,mpc8548-guts", },
        /* Probably unnecessary? */
        { .compatible = "gpio-leds", },
+       /* For all PCI controllers */
+       { .compatible = "fsl,mpc8540-pci", },
+       { .compatible = "fsl,mpc8548-pcie", },
+       { .compatible = "fsl,p1022-pcie", },
+       { .compatible = "fsl,p1010-pcie", },
+       { .compatible = "fsl,p1023-pcie", },
+       { .compatible = "fsl,p4080-pcie", },
+       { .compatible = "fsl,qoriq-pcie-v2.4", },
+       { .compatible = "fsl,qoriq-pcie-v2.3", },
+       { .compatible = "fsl,qoriq-pcie-v2.2", },
        {},
 };
 
 
 #include <linux/kdev_t.h>
 #include <linux/delay.h>
 #include <linux/interrupt.h>
-#include <linux/memblock.h>
 
 #include <asm/time.h>
 #include <asm/machdep.h>
  */
 void __init corenet_ds_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-       struct pci_controller *hose;
-#endif
-       dma_addr_t max = 0xffffffff;
-
        mpc85xx_smp_init();
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,p4080-pcie") ||
-                   of_device_is_compatible(np, "fsl,qoriq-pcie-v2.2") ||
-                   of_device_is_compatible(np, "fsl,qoriq-pcie-v2.3") ||
-                   of_device_is_compatible(np, "fsl,qoriq-pcie-v2.4")) {
-                       fsl_add_bridge(np, 0);
-                       hose = pci_find_hose_for_OF_device(np);
-                       max = min(max, hose->dma_window_base_cur +
-                                       hose->dma_window_size);
-               }
-       }
-
-#ifdef CONFIG_PPC64
+#if defined(CONFIG_PCI) && defined(CONFIG_PPC64)
        pci_devs_phb_init();
 #endif
-#endif
 
-#ifdef CONFIG_SWIOTLB
-       if ((memblock_end_of_DRAM() - 1) > max) {
-               ppc_swiotlb_enable = 1;
-               set_pci_dma_ops(&swiotlb_dma_ops);
-               ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-       }
-#endif
+       fsl_pci_assign_primary();
+
+       swiotlb_detect_4g();
+
        pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
 }
 
 
 #include <linux/seq_file.h>
 #include <linux/interrupt.h>
 #include <linux/of_platform.h>
-#include <linux/memblock.h>
 
 #include <asm/time.h>
 #include <asm/machdep.h>
        of_node_put(cascade_node);
 }
 
-#ifdef CONFIG_PCI
-static int primary_phb_addr;
-#endif /* CONFIG_PCI */
-
-/*
- * Setup the architecture
- */
-static void __init ge_imp3a_setup_arch(void)
+static void ge_imp3a_pci_assign_primary(void)
 {
-       struct device_node *regs;
 #ifdef CONFIG_PCI
        struct device_node *np;
-       struct pci_controller *hose;
-#endif
-       dma_addr_t max = 0xffffffff;
+       struct resource rsrc;
 
-       if (ppc_md.progress)
-               ppc_md.progress("ge_imp3a_setup_arch()", 0);
-
-#ifdef CONFIG_PCI
        for_each_node_by_type(np, "pci") {
                if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
                    of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
                    of_device_is_compatible(np, "fsl,p2020-pcie")) {
-                       struct resource rsrc;
                        of_address_to_resource(np, 0, &rsrc);
-                       if ((rsrc.start & 0xfffff) == primary_phb_addr)
-                               fsl_add_bridge(np, 1);
-                       else
-                               fsl_add_bridge(np, 0);
-
-                       hose = pci_find_hose_for_OF_device(np);
-                       max = min(max, hose->dma_window_base_cur +
-                                       hose->dma_window_size);
+                       if ((rsrc.start & 0xfffff) == 0x9000)
+                               fsl_pci_primary = np;
                }
        }
 #endif
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init ge_imp3a_setup_arch(void)
+{
+       struct device_node *regs;
+
+       if (ppc_md.progress)
+               ppc_md.progress("ge_imp3a_setup_arch()", 0);
 
        mpc85xx_smp_init();
 
-#ifdef CONFIG_SWIOTLB
-       if ((memblock_end_of_DRAM() - 1) > max) {
-               ppc_swiotlb_enable = 1;
-               set_pci_dma_ops(&swiotlb_dma_ops);
-               ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-       }
-#endif
+       ge_imp3a_pci_assign_primary();
+
+       swiotlb_detect_4g();
 
        /* Remap basic board registers */
        regs = of_find_compatible_node(NULL, NULL, "ge,imp3a-fpga-regs");
 {
        unsigned long root = of_get_flat_dt_root();
 
-       if (of_flat_dt_is_compatible(root, "ge,IMP3A")) {
-#ifdef CONFIG_PCI
-               primary_phb_addr = 0x9000;
-#endif
-               return 1;
-       }
-
-       return 0;
+       return of_flat_dt_is_compatible(root, "ge,IMP3A");
 }
 
-machine_device_initcall(ge_imp3a, mpc85xx_common_publish_devices);
+machine_arch_initcall(ge_imp3a, mpc85xx_common_publish_devices);
 
 machine_arch_initcall(ge_imp3a, swiotlb_setup_bus_notifier);
 
 
 #include <linux/seq_file.h>
 #include <linux/interrupt.h>
 #include <linux/of_platform.h>
-#include <linux/memblock.h>
 
 #include <asm/time.h>
 #include <asm/machdep.h>
  */
 static void __init mpc8536_ds_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-       struct pci_controller *hose;
-#endif
-       dma_addr_t max = 0xffffffff;
-
        if (ppc_md.progress)
                ppc_md.progress("mpc8536_ds_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-                   of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
-                       struct resource rsrc;
-                       of_address_to_resource(np, 0, &rsrc);
-                       if ((rsrc.start & 0xfffff) == 0x8000)
-                               fsl_add_bridge(np, 1);
-                       else
-                               fsl_add_bridge(np, 0);
-
-                       hose = pci_find_hose_for_OF_device(np);
-                       max = min(max, hose->dma_window_base_cur +
-                                       hose->dma_window_size);
-               }
-       }
-
-#endif
+       fsl_pci_assign_primary();
 
-#ifdef CONFIG_SWIOTLB
-       if ((memblock_end_of_DRAM() - 1) > max) {
-               ppc_swiotlb_enable = 1;
-               set_pci_dma_ops(&swiotlb_dma_ops);
-               ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-       }
-#endif
+       swiotlb_detect_4g();
 
        printk("MPC8536 DS board from Freescale Semiconductor\n");
 }
 
-machine_device_initcall(mpc8536_ds, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc8536_ds, mpc85xx_common_publish_devices);
 
 machine_arch_initcall(mpc8536_ds, swiotlb_setup_bus_notifier);
 
 
 
 static void __init mpc85xx_ads_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-
        if (ppc_md.progress)
                ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
 
 #endif
 
 #ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
-               fsl_add_bridge(np, 1);
-
        ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 #endif
+
+       fsl_pci_assign_primary();
 }
 
 static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
        seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 }
 
-machine_device_initcall(mpc85xx_ads, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc85xx_ads, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
 
 
 #endif /* CONFIG_PPC_I8259 */
 
+static void mpc85xx_cds_pci_assign_primary(void)
+{
+#ifdef CONFIG_PCI
+       struct device_node *np;
+
+       if (fsl_pci_primary)
+               return;
+
+       /*
+        * MPC85xx_CDS has ISA bridge but unfortunately there is no
+        * isa node in device tree. We now looking for i8259 node as
+        * a workaround for such a broken device tree. This routine
+        * is for complying to all device trees.
+        */
+       np = of_find_node_by_name(NULL, "i8259");
+       while ((fsl_pci_primary = of_get_parent(np))) {
+               of_node_put(np);
+               np = fsl_pci_primary;
+
+               if ((of_device_is_compatible(np, "fsl,mpc8540-pci") ||
+                   of_device_is_compatible(np, "fsl,mpc8548-pcie")) &&
+                   of_device_is_available(np))
+                       return;
+       }
+#endif
+}
+
 /*
  * Setup the architecture
  */
        }
 
 #ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-                   of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
-                       struct resource rsrc;
-                       of_address_to_resource(np, 0, &rsrc);
-                       if ((rsrc.start & 0xfffff) == 0x8000)
-                               fsl_add_bridge(np, 1);
-                       else
-                               fsl_add_bridge(np, 0);
-               }
-       }
-
        ppc_md.pci_irq_fixup = mpc85xx_cds_pci_irq_fixup;
        ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 #endif
+
+       mpc85xx_cds_pci_assign_primary();
+       fsl_pci_assign_primary();
 }
 
 static void mpc85xx_cds_show_cpuinfo(struct seq_file *m)
         return of_flat_dt_is_compatible(root, "MPC85xxCDS");
 }
 
-machine_device_initcall(mpc85xx_cds, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc85xx_cds, mpc85xx_common_publish_devices);
 
 define_machine(mpc85xx_cds) {
        .name           = "MPC85xx CDS",
 
 #include <linux/seq_file.h>
 #include <linux/interrupt.h>
 #include <linux/of_platform.h>
-#include <linux/memblock.h>
 
 #include <asm/time.h>
 #include <asm/machdep.h>
 }
 #endif /* CONFIG_PCI */
 
-static void __init mpc85xx_ds_pci_init(void)
+static void __init mpc85xx_ds_uli_init(void)
 {
 #ifdef CONFIG_PCI
        struct device_node *node;
 
-       fsl_pci_init();
-
        /* See if we have a ULI under the primary */
 
        node = of_find_node_by_name(NULL, "uli1575");
                ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
 
        swiotlb_detect_4g();
-       mpc85xx_ds_pci_init();
+       fsl_pci_assign_primary();
+       mpc85xx_ds_uli_init();
        mpc85xx_smp_init();
 
        printk("MPC85xx DS board from Freescale Semiconductor\n");
        return !!of_flat_dt_is_compatible(root, "MPC8544DS");
 }
 
-machine_device_initcall(mpc8544_ds, mpc85xx_common_publish_devices);
-machine_device_initcall(mpc8572_ds, mpc85xx_common_publish_devices);
-machine_device_initcall(p2020_ds, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc8544_ds, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc8572_ds, mpc85xx_common_publish_devices);
+machine_arch_initcall(p2020_ds, mpc85xx_common_publish_devices);
 
 machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier);
 machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier);
 
 
 static void __init mpc85xx_mds_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct pci_controller *hose;
-       struct device_node *np;
-#endif
-       dma_addr_t max = 0xffffffff;
-
        if (ppc_md.progress)
                ppc_md.progress("mpc85xx_mds_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-                   of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
-                       struct resource rsrc;
-                       of_address_to_resource(np, 0, &rsrc);
-                       if ((rsrc.start & 0xfffff) == 0x8000)
-                               fsl_add_bridge(np, 1);
-                       else
-                               fsl_add_bridge(np, 0);
-
-                       hose = pci_find_hose_for_OF_device(np);
-                       max = min(max, hose->dma_window_base_cur +
-                                       hose->dma_window_size);
-               }
-       }
-#endif
-
        mpc85xx_smp_init();
 
        mpc85xx_mds_qe_init();
 
-#ifdef CONFIG_SWIOTLB
-       if ((memblock_end_of_DRAM() - 1) > max) {
-               ppc_swiotlb_enable = 1;
-               set_pci_dma_ops(&swiotlb_dma_ops);
-               ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-       }
-#endif
+       fsl_pci_assign_primary();
+
+       swiotlb_detect_4g();
 }
 
 
        return mpc85xx_common_publish_devices();
 }
 
-machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices);
-machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices);
-machine_device_initcall(p1021_mds, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc8568_mds, mpc85xx_publish_devices);
+machine_arch_initcall(mpc8569_mds, mpc85xx_publish_devices);
+machine_arch_initcall(p1021_mds, mpc85xx_common_publish_devices);
 
 machine_arch_initcall(mpc8568_mds, swiotlb_setup_bus_notifier);
 machine_arch_initcall(mpc8569_mds, swiotlb_setup_bus_notifier);
 
  */
 static void __init mpc85xx_rdb_setup_arch(void)
 {
-#if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE)
+#ifdef CONFIG_QUICC_ENGINE
        struct device_node *np;
 #endif
 
        if (ppc_md.progress)
                ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,mpc8548-pcie"))
-                       fsl_add_bridge(np, 0);
-       }
-
-#endif
-
        mpc85xx_smp_init();
 
+       fsl_pci_assign_primary();
+
 #ifdef CONFIG_QUICC_ENGINE
        np = of_find_compatible_node(NULL, NULL, "fsl,qe");
        if (!np) {
        printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
 }
 
-machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices);
-machine_device_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
-machine_device_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
-machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices);
-machine_device_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
-machine_device_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
-machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
-machine_device_initcall(p1025_rdb, mpc85xx_common_publish_devices);
-machine_device_initcall(p1024_rdb, mpc85xx_common_publish_devices);
+machine_arch_initcall(p2020_rdb, mpc85xx_common_publish_devices);
+machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
 
  */
 static void __init p1010_rdb_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-
        if (ppc_md.progress)
                ppc_md.progress("p1010_rdb_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,p1010-pcie"))
-                       fsl_add_bridge(np, 0);
-       }
-
-#endif
+       fsl_pci_assign_primary();
 
        printk(KERN_INFO "P1010 RDB board from Freescale Semiconductor\n");
 }
 
-machine_device_initcall(p1010_rdb, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1010_rdb, mpc85xx_common_publish_devices);
 machine_arch_initcall(p1010_rdb, swiotlb_setup_bus_notifier);
 
 /*
 
 
 #include <linux/pci.h>
 #include <linux/of_platform.h>
-#include <linux/memblock.h>
 #include <asm/div64.h>
 #include <asm/mpic.h>
 #include <asm/swiotlb.h>
  */
 static void __init p1022_ds_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-       dma_addr_t max = 0xffffffff;
-
        if (ppc_md.progress)
                ppc_md.progress("p1022_ds_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,p1022-pcie") {
-               struct resource rsrc;
-               struct pci_controller *hose;
-
-               of_address_to_resource(np, 0, &rsrc);
-
-               if ((rsrc.start & 0xfffff) == 0x8000)
-                       fsl_add_bridge(np, 1);
-               else
-                       fsl_add_bridge(np, 0);
-
-               hose = pci_find_hose_for_OF_device(np);
-               max = min(max, hose->dma_window_base_cur +
-                         hose->dma_window_size);
-       }
-#endif
-
 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
        diu_ops.get_pixel_format        = p1022ds_get_pixel_format;
        diu_ops.set_gamma_table         = p1022ds_set_gamma_table;
 
        mpc85xx_smp_init();
 
-#ifdef CONFIG_SWIOTLB
-       if ((memblock_end_of_DRAM() - 1) > max) {
-               ppc_swiotlb_enable = 1;
-               set_pci_dma_ops(&swiotlb_dma_ops);
-               ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-       }
-#endif
+       fsl_pci_assign_primary();
+
+       swiotlb_detect_4g();
 
        pr_info("Freescale P1022 DS reference board\n");
 }
 
-machine_device_initcall(p1022_ds, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1022_ds, mpc85xx_common_publish_devices);
 
 machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier);
 
 
 
 #include <linux/pci.h>
 #include <linux/of_platform.h>
-#include <linux/memblock.h>
 #include <asm/div64.h>
 #include <asm/mpic.h>
 #include <asm/swiotlb.h>
  */
 static void __init p1022_rdk_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-       dma_addr_t max = 0xffffffff;
-
        if (ppc_md.progress)
                ppc_md.progress("p1022_rdk_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,p1022-pcie") {
-               struct resource rsrc;
-               struct pci_controller *hose;
-
-               of_address_to_resource(np, 0, &rsrc);
-
-               if ((rsrc.start & 0xfffff) == 0x8000)
-                       fsl_add_bridge(np, 1);
-               else
-                       fsl_add_bridge(np, 0);
-
-               hose = pci_find_hose_for_OF_device(np);
-               max = min(max, hose->dma_window_base_cur +
-                         hose->dma_window_size);
-       }
-#endif
-
 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
        diu_ops.set_monitor_port        = p1022rdk_set_monitor_port;
        diu_ops.set_pixel_clock         = p1022rdk_set_pixel_clock;
 
        mpc85xx_smp_init();
 
-#ifdef CONFIG_SWIOTLB
-       if ((memblock_end_of_DRAM() - 1) > max) {
-               ppc_swiotlb_enable = 1;
-               set_pci_dma_ops(&swiotlb_dma_ops);
-               ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-       }
-#endif
+       fsl_pci_assign_primary();
+
+       swiotlb_detect_4g();
 
        pr_info("Freescale / iVeia P1022 RDK reference board\n");
 }
 
-machine_device_initcall(p1022_rdk, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1022_rdk, mpc85xx_common_publish_devices);
 
 machine_arch_initcall(p1022_rdk, swiotlb_setup_bus_notifier);
 
 
                }
        }
 
-#ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,p1023-pcie")
-               fsl_add_bridge(np, 0);
-#endif
-
        mpc85xx_smp_init();
+
+       fsl_pci_assign_primary();
 }
 
-machine_device_initcall(p1023_rds, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1023_rds, mpc85xx_common_publish_devices);
 
 static void __init mpc85xx_rds_pic_init(void)
 {
 
        .power_save             = e500_idle,
 };
 
-machine_device_initcall(p2041_rdb, corenet_ds_publish_devices);
+machine_arch_initcall(p2041_rdb, corenet_ds_publish_devices);
 
 #ifdef CONFIG_SWIOTLB
 machine_arch_initcall(p2041_rdb, swiotlb_setup_bus_notifier);
 
        .power_save             = e500_idle,
 };
 
-machine_device_initcall(p3041_ds, corenet_ds_publish_devices);
+machine_arch_initcall(p3041_ds, corenet_ds_publish_devices);
 
 #ifdef CONFIG_SWIOTLB
 machine_arch_initcall(p3041_ds, swiotlb_setup_bus_notifier);
 
        .power_save             = e500_idle,
 };
 
-machine_device_initcall(p4080_ds, corenet_ds_publish_devices);
+machine_arch_initcall(p4080_ds, corenet_ds_publish_devices);
 #ifdef CONFIG_SWIOTLB
 machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier);
 #endif
 
 #endif
 };
 
-machine_device_initcall(p5020_ds, corenet_ds_publish_devices);
+machine_arch_initcall(p5020_ds, corenet_ds_publish_devices);
 
 #ifdef CONFIG_SWIOTLB
 machine_arch_initcall(p5020_ds, swiotlb_setup_bus_notifier);
 
 #endif
 };
 
-machine_device_initcall(p5040_ds, corenet_ds_publish_devices);
+machine_arch_initcall(p5040_ds, corenet_ds_publish_devices);
 
 #ifdef CONFIG_SWIOTLB
 machine_arch_initcall(p5040_ds, swiotlb_setup_bus_notifier);
 
 {
        ppc_md.progress("qemu_e500_setup_arch()", 0);
 
-       fsl_pci_init();
+       fsl_pci_assign_primary();
        swiotlb_detect_4g();
        mpc85xx_smp_init();
 }
        return !!of_flat_dt_is_compatible(root, "fsl,qemu-e500");
 }
 
-machine_device_initcall(qemu_e500, mpc85xx_common_publish_devices);
+machine_arch_initcall(qemu_e500, mpc85xx_common_publish_devices);
 
 define_machine(qemu_e500) {
        .name                   = "QEMU e500",
 
  */
 static void __init sbc8548_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-
        if (ppc_md.progress)
                ppc_md.progress("sbc8548_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-                   of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
-                       struct resource rsrc;
-                       of_address_to_resource(np, 0, &rsrc);
-                       if ((rsrc.start & 0xfffff) == 0x8000)
-                               fsl_add_bridge(np, 1);
-                       else
-                               fsl_add_bridge(np, 0);
-               }
-       }
-#endif
+       fsl_pci_assign_primary();
+
        sbc_rev = sbc8548_hw_rev();
 }
 
        seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 }
 
-machine_device_initcall(sbc8548, mpc85xx_common_publish_devices);
+machine_arch_initcall(sbc8548, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
 
  */
 static void __init socrates_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-
        if (ppc_md.progress)
                ppc_md.progress("socrates_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
-               fsl_add_bridge(np, 1);
-#endif
+       fsl_pci_assign_primary();
 }
 
-machine_device_initcall(socrates, mpc85xx_common_publish_devices);
+machine_arch_initcall(socrates, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
 
  */
 static void __init stx_gp3_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-
        if (ppc_md.progress)
                ppc_md.progress("stx_gp3_setup_arch()", 0);
 
+       fsl_pci_assign_primary();
+
 #ifdef CONFIG_CPM2
        cpm2_reset();
 #endif
-
-#ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
-               fsl_add_bridge(np, 1);
-#endif
 }
 
 static void stx_gp3_show_cpuinfo(struct seq_file *m)
        seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
 }
 
-machine_device_initcall(stx_gp3, mpc85xx_common_publish_devices);
+machine_arch_initcall(stx_gp3, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
 
  */
 static void __init tqm85xx_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-
        if (ppc_md.progress)
                ppc_md.progress("tqm85xx_setup_arch()", 0);
 
        cpm2_reset();
 #endif
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-                   of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
-                       struct resource rsrc;
-                       if (!of_address_to_resource(np, 0, &rsrc)) {
-                               if ((rsrc.start & 0xfffff) == 0x8000)
-                                       fsl_add_bridge(np, 1);
-                               else
-                                       fsl_add_bridge(np, 0);
-                       }
-               }
-       }
-#endif
+       fsl_pci_assign_primary();
 }
 
 static void tqm85xx_show_cpuinfo(struct seq_file *m)
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520,
                tqm85xx_ti1520_fixup);
 
-machine_device_initcall(tqm85xx, mpc85xx_common_publish_devices);
+machine_arch_initcall(tqm85xx, mpc85xx_common_publish_devices);
 
 static const char *board[] __initdata = {
        "tqc,tqm8540",
 
        }
 }
 
-#ifdef CONFIG_PCI
-static int primary_phb_addr;
-#endif
-
 /*
  * Setup the architecture
  */
 static void __init xes_mpc85xx_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
        struct device_node *root;
        const char *model = "Unknown";
 
 
        xes_mpc85xx_fixups();
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
-                   of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
-                       struct resource rsrc;
-                       of_address_to_resource(np, 0, &rsrc);
-                       if ((rsrc.start & 0xfffff) == primary_phb_addr)
-                               fsl_add_bridge(np, 1);
-                       else
-                               fsl_add_bridge(np, 0);
-               }
-       }
-#endif
-
        mpc85xx_smp_init();
+
+       fsl_pci_assign_primary();
 }
 
-machine_device_initcall(xes_mpc8572, mpc85xx_common_publish_devices);
-machine_device_initcall(xes_mpc8548, mpc85xx_common_publish_devices);
-machine_device_initcall(xes_mpc8540, mpc85xx_common_publish_devices);
+machine_arch_initcall(xes_mpc8572, mpc85xx_common_publish_devices);
+machine_arch_initcall(xes_mpc8548, mpc85xx_common_publish_devices);
+machine_arch_initcall(xes_mpc8540, mpc85xx_common_publish_devices);
 
 /*
  * Called very early, device-tree isn't unflattened
 {
        unsigned long root = of_get_flat_dt_root();
 
-       if (of_flat_dt_is_compatible(root, "xes,MPC8572")) {
-#ifdef CONFIG_PCI
-               primary_phb_addr = 0x8000;
-#endif
-               return 1;
-       } else {
-               return 0;
-       }
+       return of_flat_dt_is_compatible(root, "xes,MPC8572");
 }
 
 static int __init xes_mpc8548_probe(void)
 {
        unsigned long root = of_get_flat_dt_root();
 
-       if (of_flat_dt_is_compatible(root, "xes,MPC8548")) {
-#ifdef CONFIG_PCI
-               primary_phb_addr = 0xb000;
-#endif
-               return 1;
-       } else {
-               return 0;
-       }
+       return of_flat_dt_is_compatible(root, "xes,MPC8548");
 }
 
 static int __init xes_mpc8540_probe(void)
 {
        unsigned long root = of_get_flat_dt_root();
 
-       if (of_flat_dt_is_compatible(root, "xes,MPC8540")) {
-#ifdef CONFIG_PCI
-               primary_phb_addr = 0xb000;
-#endif
-               return 1;
-       } else {
-               return 0;
-       }
+       return of_flat_dt_is_compatible(root, "xes,MPC8540");
 }
 
 define_machine(xes_mpc8572) {
 
 static void __init gef_ppc9a_setup_arch(void)
 {
        struct device_node *regs;
-#ifdef CONFIG_PCI
-       struct device_node *np;
-
-       for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
-               fsl_add_bridge(np, 1);
-       }
-#endif
 
        printk(KERN_INFO "GE Intelligent Platforms PPC9A 6U VME SBC\n");
 
        mpc86xx_smp_init();
 #endif
 
+       fsl_pci_assign_primary();
+
        /* Remap basic board registers */
        regs = of_find_compatible_node(NULL, NULL, "gef,ppc9a-fpga-regs");
        if (regs) {
 static __initdata struct of_device_id of_bus_ids[] = {
        { .compatible = "simple-bus", },
        { .compatible = "gianfar", },
+       { .compatible = "fsl,mpc8641-pcie", },
        {},
 };
 
 
        return 0;
 }
-machine_device_initcall(gef_ppc9a, declare_of_platform_devices);
+machine_arch_initcall(gef_ppc9a, declare_of_platform_devices);
 
 define_machine(gef_ppc9a) {
        .name                   = "GE PPC9A",
 
 static void __init gef_sbc310_setup_arch(void)
 {
        struct device_node *regs;
-#ifdef CONFIG_PCI
-       struct device_node *np;
-
-       for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
-               fsl_add_bridge(np, 1);
-       }
-#endif
-
        printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n");
 
 #ifdef CONFIG_SMP
        mpc86xx_smp_init();
 #endif
 
+       fsl_pci_assign_primary();
+
        /* Remap basic board registers */
        regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
        if (regs) {
 static __initdata struct of_device_id of_bus_ids[] = {
        { .compatible = "simple-bus", },
        { .compatible = "gianfar", },
+       { .compatible = "fsl,mpc8641-pcie", },
        {},
 };
 
 
        return 0;
 }
-machine_device_initcall(gef_sbc310, declare_of_platform_devices);
+machine_arch_initcall(gef_sbc310, declare_of_platform_devices);
 
 define_machine(gef_sbc310) {
        .name                   = "GE SBC310",
 
 static void __init gef_sbc610_setup_arch(void)
 {
        struct device_node *regs;
-#ifdef CONFIG_PCI
-       struct device_node *np;
-
-       for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
-               fsl_add_bridge(np, 1);
-       }
-#endif
 
        printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n");
 
        mpc86xx_smp_init();
 #endif
 
+       fsl_pci_assign_primary();
+
        /* Remap basic board registers */
        regs = of_find_compatible_node(NULL, NULL, "gef,fpga-regs");
        if (regs) {
 static __initdata struct of_device_id of_bus_ids[] = {
        { .compatible = "simple-bus", },
        { .compatible = "gianfar", },
+       { .compatible = "fsl,mpc8641-pcie", },
        {},
 };
 
 
        return 0;
 }
-machine_device_initcall(gef_sbc610, declare_of_platform_devices);
+machine_arch_initcall(gef_sbc610, declare_of_platform_devices);
 
 define_machine(gef_sbc610) {
        .name                   = "GE SBC610",
 
        { .compatible = "simple-bus", },
        /* So that the DMA channel nodes can be probed individually: */
        { .compatible = "fsl,eloplus-dma", },
+       /* PCI controllers */
+       { .compatible = "fsl,mpc8610-pci", },
+       { .compatible = "fsl,mpc8641-pcie", },
        {}
 };
 
 
        return 0;
 }
-machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
+machine_arch_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
 
 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
 
 static void __init mpc86xx_hpcd_setup_arch(void)
 {
        struct resource r;
-       struct device_node *np;
        unsigned char *pixis;
 
        if (ppc_md.progress)
                ppc_md.progress("mpc86xx_hpcd_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_node_by_type(np, "pci") {
-               if (of_device_is_compatible(np, "fsl,mpc8610-pci")
-                   || of_device_is_compatible(np, "fsl,mpc8641-pcie")) {
-                       struct resource rsrc;
-                       of_address_to_resource(np, 0, &rsrc);
-                       if ((rsrc.start & 0xfffff) == 0xa000)
-                               fsl_add_bridge(np, 1);
-                       else
-                               fsl_add_bridge(np, 0);
-               }
-        }
-#endif
+       fsl_pci_assign_primary();
+
 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
        diu_ops.get_pixel_format        = mpc8610hpcd_get_pixel_format;
        diu_ops.set_gamma_table         = mpc8610hpcd_set_gamma_table;
 
 #include <linux/delay.h>
 #include <linux/seq_file.h>
 #include <linux/of_platform.h>
-#include <linux/memblock.h>
 
 #include <asm/time.h>
 #include <asm/machdep.h>
 static int mpc86xx_exclude_device(struct pci_controller *hose,
                                   u_char bus, u_char devfn)
 {
-       struct device_node* node;       
-       struct resource rsrc;
-
-       node = hose->dn;
-       of_address_to_resource(node, 0, &rsrc);
-
-       if ((rsrc.start & 0xfffff) == 0x8000) {
+       if (hose->dn == fsl_pci_primary)
                return uli_exclude_device(hose, bus, devfn);
-       }
 
        return PCIBIOS_SUCCESSFUL;
 }
 static void __init
 mpc86xx_hpcn_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-       struct pci_controller *hose;
-#endif
-       dma_addr_t max = 0xffffffff;
-
        if (ppc_md.progress)
                ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0);
 
 #ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
-               struct resource rsrc;
-               of_address_to_resource(np, 0, &rsrc);
-               if ((rsrc.start & 0xfffff) == 0x8000)
-                       fsl_add_bridge(np, 1);
-               else
-                       fsl_add_bridge(np, 0);
-               hose = pci_find_hose_for_OF_device(np);
-               max = min(max, hose->dma_window_base_cur +
-                         hose->dma_window_size);
-       }
-
        ppc_md.pci_exclude_device = mpc86xx_exclude_device;
-
 #endif
 
        printk("MPC86xx HPCN board from Freescale Semiconductor\n");
        mpc86xx_smp_init();
 #endif
 
-#ifdef CONFIG_SWIOTLB
-       if ((memblock_end_of_DRAM() - 1) > max) {
-               ppc_swiotlb_enable = 1;
-               set_pci_dma_ops(&swiotlb_dma_ops);
-               ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-       }
-#endif
+       fsl_pci_assign_primary();
+
+       swiotlb_detect_4g();
 }
 
 
        { .compatible = "simple-bus", },
        { .compatible = "fsl,srio", },
        { .compatible = "gianfar", },
+       { .compatible = "fsl,mpc8641-pcie", },
        {},
 };
 
 
        return 0;
 }
-machine_device_initcall(mpc86xx_hpcn, declare_of_platform_devices);
+machine_arch_initcall(mpc86xx_hpcn, declare_of_platform_devices);
 machine_arch_initcall(mpc86xx_hpcn, swiotlb_setup_bus_notifier);
 
 define_machine(mpc86xx_hpcn) {
 
 static void __init
 sbc8641_setup_arch(void)
 {
-#ifdef CONFIG_PCI
-       struct device_node *np;
-#endif
-
        if (ppc_md.progress)
                ppc_md.progress("sbc8641_setup_arch()", 0);
 
-#ifdef CONFIG_PCI
-       for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie")
-               fsl_add_bridge(np, 0);
-#endif
-
        printk("SBC8641 board from Wind River\n");
 
 #ifdef CONFIG_SMP
        mpc86xx_smp_init();
 #endif
+
+       fsl_pci_assign_primary();
 }
 
 
 static __initdata struct of_device_id of_bus_ids[] = {
        { .compatible = "simple-bus", },
        { .compatible = "gianfar", },
+       { .compatible = "fsl,mpc8641-pcie", },
        {},
 };
 
 
        return 0;
 }
-machine_device_initcall(sbc8641, declare_of_platform_devices);
+machine_arch_initcall(sbc8641, declare_of_platform_devices);
 
 define_machine(sbc8641) {
        .name                   = "SBC8641D",
 
 
 struct device_node *fsl_pci_primary;
 
-void __devinit fsl_pci_init(void)
+void fsl_pci_assign_primary(void)
 {
-       int ret;
-       struct device_node *node;
-       struct pci_controller *hose;
-       dma_addr_t max = 0xffffffff;
+       struct device_node *np;
 
        /* Callers can specify the primary bus using other means. */
-       if (!fsl_pci_primary) {
-               /* If a PCI host bridge contains an ISA node, it's primary. */
-               node = of_find_node_by_type(NULL, "isa");
-               while ((fsl_pci_primary = of_get_parent(node))) {
-                       of_node_put(node);
-                       node = fsl_pci_primary;
-
-                       if (of_match_node(pci_ids, node))
-                               break;
-               }
+       if (fsl_pci_primary)
+               return;
+
+       /* If a PCI host bridge contains an ISA node, it's primary. */
+       np = of_find_node_by_type(NULL, "isa");
+       while ((fsl_pci_primary = of_get_parent(np))) {
+               of_node_put(np);
+               np = fsl_pci_primary;
+
+               if (of_match_node(pci_ids, np) && of_device_is_available(np))
+                       return;
        }
 
-       node = NULL;
-       for_each_node_by_type(node, "pci") {
-               if (of_match_node(pci_ids, node)) {
-                       /*
-                        * If there's no PCI host bridge with ISA, arbitrarily
-                        * designate one as primary.  This can go away once
-                        * various bugs with primary-less systems are fixed.
-                        */
-                       if (!fsl_pci_primary)
-                               fsl_pci_primary = node;
-
-                       ret = fsl_add_bridge(node, fsl_pci_primary == node);
-                       if (ret == 0) {
-                               hose = pci_find_hose_for_OF_device(node);
-                               max = min(max, hose->dma_window_base_cur +
-                                               hose->dma_window_size);
-                       }
+       /*
+        * If there's no PCI host bridge with ISA, arbitrarily
+        * designate one as primary.  This can go away once
+        * various bugs with primary-less systems are fixed.
+        */
+       for_each_matching_node(np, pci_ids) {
+               if (of_device_is_available(np)) {
+                       fsl_pci_primary = np;
+                       of_node_put(np);
+                       return;
                }
        }
+}
+
+static int __devinit fsl_pci_probe(struct platform_device *pdev)
+{
+       int ret;
+       struct device_node *node;
+       struct pci_controller *hose;
+
+       node = pdev->dev.of_node;
+       ret = fsl_add_bridge(node, fsl_pci_primary == node);
 
 #ifdef CONFIG_SWIOTLB
-       /*
-        * if we couldn't map all of DRAM via the dma windows
-        * we need SWIOTLB to handle buffers located outside of
-        * dma capable memory region
-        */
-       if (memblock_end_of_DRAM() - 1 > max)
-               ppc_swiotlb_enable = 1;
+       if (ret == 0) {
+               hose = pci_find_hose_for_OF_device(pdev->dev.of_node);
+
+               /*
+                * if we couldn't map all of DRAM via the dma windows
+                * we need SWIOTLB to handle buffers located outside of
+                * dma capable memory region
+                */
+               if (memblock_end_of_DRAM() - 1 > hose->dma_window_base_cur +
+                               hose->dma_window_size)
+                       ppc_swiotlb_enable = 1;
+       }
 #endif
+
+       mpc85xx_pci_err_probe(pdev);
+
+       return 0;
+}
+
+static struct platform_driver fsl_pci_driver = {
+       .driver = {
+               .name = "fsl-pci",
+               .of_match_table = pci_ids,
+       },
+       .probe = fsl_pci_probe,
+};
+
+static int __init fsl_pci_init(void)
+{
+       return platform_driver_register(&fsl_pci_driver);
 }
+arch_initcall(fsl_pci_init);
 #endif
 
 
 extern struct device_node *fsl_pci_primary;
 
-#ifdef CONFIG_FSL_PCI
-void fsl_pci_init(void);
+#ifdef CONFIG_PCI
+void fsl_pci_assign_primary(void);
 #else
-static inline void fsl_pci_init(void) {}
+static inline void fsl_pci_assign_primary(void) {}
+#endif
+
+#ifdef CONFIG_EDAC_MPC85XX
+int mpc85xx_pci_err_probe(struct platform_device *op);
+#else
+static inline int mpc85xx_pci_err_probe(struct platform_device *op)
+{
+       return -ENOTSUPP;
+}
 #endif
 
 #endif /* __POWERPC_FSL_PCI_H */
 
        return IRQ_HANDLED;
 }
 
-static int __devinit mpc85xx_pci_err_probe(struct platform_device *op)
+int __devinit mpc85xx_pci_err_probe(struct platform_device *op)
 {
        struct edac_pci_ctl_info *pci;
        struct mpc85xx_pci_pdata *pdata;
        if (!pci)
                return -ENOMEM;
 
+       /* make sure error reporting method is sane */
+       switch (edac_op_state) {
+       case EDAC_OPSTATE_POLL:
+       case EDAC_OPSTATE_INT:
+               break;
+       default:
+               edac_op_state = EDAC_OPSTATE_INT;
+               break;
+       }
+
        pdata = pci->pvt_info;
        pdata->name = "mpc85xx_pci_err";
        pdata->irq = NO_IRQ;
        devres_release_group(&op->dev, mpc85xx_pci_err_probe);
        return res;
 }
+EXPORT_SYMBOL(mpc85xx_pci_err_probe);
 
 static int mpc85xx_pci_err_remove(struct platform_device *op)
 {
        return 0;
 }
 
-static struct of_device_id mpc85xx_pci_err_of_match[] = {
-       {
-        .compatible = "fsl,mpc8540-pcix",
-        },
-       {
-        .compatible = "fsl,mpc8540-pci",
-       },
-       {},
-};
-MODULE_DEVICE_TABLE(of, mpc85xx_pci_err_of_match);
-
-static struct platform_driver mpc85xx_pci_err_driver = {
-       .probe = mpc85xx_pci_err_probe,
-       .remove = __devexit_p(mpc85xx_pci_err_remove),
-       .driver = {
-               .name = "mpc85xx_pci_err",
-               .owner = THIS_MODULE,
-               .of_match_table = mpc85xx_pci_err_of_match,
-       },
-};
-
 #endif                         /* CONFIG_PCI */
 
 /**************************** L2 Err device ***************************/
        if (res)
                printk(KERN_WARNING EDAC_MOD_STR "L2 fails to register\n");
 
-#ifdef CONFIG_PCI
-       res = platform_driver_register(&mpc85xx_pci_err_driver);
-       if (res)
-               printk(KERN_WARNING EDAC_MOD_STR "PCI fails to register\n");
-#endif
-
 #ifdef CONFIG_FSL_SOC_BOOKE
        pvr = mfspr(SPRN_PVR);
 
            (PVR_VER(pvr) == PVR_VER_E500V2)) {
                on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0);
        }
-#endif
-#ifdef CONFIG_PCI
-       platform_driver_unregister(&mpc85xx_pci_err_driver);
 #endif
        platform_driver_unregister(&mpc85xx_l2_err_driver);
        platform_driver_unregister(&mpc85xx_mc_err_driver);