target/sparc: Add feature bit for VIS4

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

diff --git a/target/sparc/cpu-feature.h.inc b/target/sparc/cpu-feature.h.inc
index e2e6de9144c88ba46f8de81483b755cd24efdbb9..be810052376c2259a24353ab337bfaddeb31a152 100644 (file)
--- a/target/sparc/cpu-feature.h.inc
+++ b/target/sparc/cpu-feature.h.inc
@@ -15,3 +15,4 @@ FEATURE(CASA)
 FEATURE(FMAF)
 FEATURE(VIS3)
 FEATURE(IMA)
+FEATURE(VIS4)

diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 640406570d799988b005244d89b9c70e11cfe58b..6fa0bb6ff5dff58fff79bed35d740eebfd204cc5 100644 (file)
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -2430,6 +2430,7 @@ static int extract_qfpreg(DisasContext *dc, int x)
 # define avail_VIS2(C)    ((C)->def->features & CPU_FEATURE_VIS2)
 # define avail_VIS3(C)    ((C)->def->features & CPU_FEATURE_VIS3)
 # define avail_VIS3B(C)   avail_VIS3(C)
+# define avail_VIS4(C)    ((C)->def->features & CPU_FEATURE_VIS4)
 #else
 # define avail_32(C)      true
 # define avail_ASR17(C)   ((C)->def->features & CPU_FEATURE_ASR17)
@@ -2446,6 +2447,7 @@ static int extract_qfpreg(DisasContext *dc, int x)
 # define avail_VIS2(C)    false
 # define avail_VIS3(C)    false
 # define avail_VIS3B(C)   false
+# define avail_VIS4(C)    false
 #endif
 
 /* Default case for non jump instructions. */