arm64: dts: qcom: sm8350: Add rpmhpd node

This adds RPMH power domain found in SM8350 SoC

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210212115532.1339942-3-vkoul@kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
index d6b312533439b1a0bc481d965a04eb60e3977bb3..f354a73e6a223915eb4691453032dff670327f6d 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
@@ -591,6 +591,55 @@
                                clocks = <&xo_board>;
                        };
 
+                       rpmhpd: power-controller {
+                               compatible = "qcom,sm8350-rpmhpd";
+                               #power-domain-cells = <1>;
+                               operating-points-v2 = <&rpmhpd_opp_table>;
+
+                               rpmhpd_opp_table: opp-table {
+                                       compatible = "operating-points-v2";
+
+                                       rpmhpd_opp_ret: opp1 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_RETENTION>;
+                                       };
+
+                                       rpmhpd_opp_min_svs: opp2 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
+                                       };
+
+                                       rpmhpd_opp_low_svs: opp3 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
+                                       };
+
+                                       rpmhpd_opp_svs: opp4 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
+                                       };
+
+                                       rpmhpd_opp_svs_l1: opp5 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
+                                       };
+
+                                       rpmhpd_opp_nom: opp6 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_NOM>;
+                                       };
+
+                                       rpmhpd_opp_nom_l1: opp7 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
+                                       };
+
+                                       rpmhpd_opp_nom_l2: opp8 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_NOM_L2>;
+                                       };
+
+                                       rpmhpd_opp_turbo: opp9 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_TURBO>;
+                                       };
+
+                                       rpmhpd_opp_turbo_l1: opp10 {
+                                               opp-level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
+                                       };
+                               };
+                       };
                };
 
                ufs_mem_hc: ufshc@1d84000 {