dmaengine: at_xdmac: Fix at_xdmac_lld struct definition

The hardware channel next descriptor view structure contains just
fields of 32 bits, while dma_addr_t can be of type u64 or u32
depending on CONFIG_ARCH_DMA_ADDR_T_64BIT. Force u32 to comply with
what the hardware expects.

Fixes: e1f7c9eee707 ("dmaengine: at_xdmac: creation of the atmel eXtended DMA Controller driver")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20211215110115.191749-11-tudor.ambarus@microchip.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index 6e5bfc9b382579b02f2be94f0efede5da4b1403a..abe8c4615e6526854f962e7387c4d3f9dd99e951 100644 (file)
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -253,15 +253,15 @@ struct at_xdmac {
 
 /* Linked List Descriptor */
 struct at_xdmac_lld {
-       dma_addr_t      mbr_nda;        /* Next Descriptor Member */
-       u32             mbr_ubc;        /* Microblock Control Member */
-       dma_addr_t      mbr_sa;         /* Source Address Member */
-       dma_addr_t      mbr_da;         /* Destination Address Member */
-       u32             mbr_cfg;        /* Configuration Register */
-       u32             mbr_bc;         /* Block Control Register */
-       u32             mbr_ds;         /* Data Stride Register */
-       u32             mbr_sus;        /* Source Microblock Stride Register */
-       u32             mbr_dus;        /* Destination Microblock Stride Register */
+       u32 mbr_nda;    /* Next Descriptor Member */
+       u32 mbr_ubc;    /* Microblock Control Member */
+       u32 mbr_sa;     /* Source Address Member */
+       u32 mbr_da;     /* Destination Address Member */
+       u32 mbr_cfg;    /* Configuration Register */
+       u32 mbr_bc;     /* Block Control Register */
+       u32 mbr_ds;     /* Data Stride Register */
+       u32 mbr_sus;    /* Source Microblock Stride Register */
+       u32 mbr_dus;    /* Destination Microblock Stride Register */
 };
 
 /* 64-bit alignment needed to update CNDA and CUBC registers in an atomic way. */