riscv/barrier: Add missing space after ','

The past form of RISCV_FENCE would cause checkpatch.pl to issue
error messages, the example is as follows:
ERROR: space required after that ',' (ctx:VxV)
26: FILE: arch/riscv/include/asm/barrier.h:27:
+#define __smp_mb()         RISCV_FENCE(rw,rw)
                                          ^
fix the remaining of RISCV_FENCE.

Signed-off-by: Eric Chan <ericchancf@google.com>
Reviewed-by: Andrea Parri <parri.andrea@gmail.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Tested-by: Samuel Holland <samuel.holland@sifive.com>
Link: https://lore.kernel.org/r/20240217131328.3669364-1-ericchancf@google.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>

diff --git a/arch/riscv/include/asm/barrier.h b/arch/riscv/include/asm/barrier.h
index 15857dbc2279f4d233911e6b7b6641efeca0a813..880b56d8480d19cb8038c366988a7369eeeaff4a 100644 (file)
--- a/arch/riscv/include/asm/barrier.h
+++ b/arch/riscv/include/asm/barrier.h
@@ -24,14 +24,14 @@
 #define __wmb()                RISCV_FENCE(ow, ow)
 
 /* These barriers do not need to enforce ordering on devices, just memory. */
-#define __smp_mb()     RISCV_FENCE(rw,rw)
-#define __smp_rmb()    RISCV_FENCE(r,r)
-#define __smp_wmb()    RISCV_FENCE(w,w)
+#define __smp_mb()     RISCV_FENCE(rw, rw)
+#define __smp_rmb()    RISCV_FENCE(r, r)
+#define __smp_wmb()    RISCV_FENCE(w, w)
 
 #define __smp_store_release(p, v)                                      \
 do {                                                                   \
        compiletime_assert_atomic_type(*p);                             \
-       RISCV_FENCE(rw,w);                                              \
+       RISCV_FENCE(rw, w);                                             \
        WRITE_ONCE(*p, v);                                              \
 } while (0)
 
@@ -39,7 +39,7 @@ do {                                                                  \
 ({                                                                     \
        typeof(*p) ___p1 = READ_ONCE(*p);                               \
        compiletime_assert_atomic_type(*p);                             \
-       RISCV_FENCE(r,rw);                                              \
+       RISCV_FENCE(r, rw);                                             \
        ___p1;                                                          \
 })
 
@@ -68,7 +68,7 @@ do {                                                                  \
  * instances the scheduler pairs this with an mb(), so nothing is necessary on
  * the new hart.
  */
-#define smp_mb__after_spinlock()       RISCV_FENCE(iorw,iorw)
+#define smp_mb__after_spinlock()       RISCV_FENCE(iorw, iorw)
 
 #include <asm-generic/barrier.h>