drm/nouveau/kms/nv50-: use NVIDIA's headers for core head_curs_clr()
authorBen Skeggs <bskeggs@redhat.com>
Sun, 21 Jun 2020 02:16:24 +0000 (12:16 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 24 Jul 2020 08:51:02 +0000 (18:51 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
drivers/gpu/drm/nouveau/dispnv50/head507d.c
drivers/gpu/drm/nouveau/dispnv50/head827d.c
drivers/gpu/drm/nouveau/dispnv50/head907d.c
drivers/gpu/drm/nouveau/dispnv50/headc37d.c

index 473119804b5b77206ad12b800f06ed45982c213d..de6ab797e7fd29be8b75c8e94eff85b79c642e12 100644 (file)
@@ -123,7 +123,10 @@ head507d_curs_clr(struct nv50_head *head)
        if ((ret = PUSH_WAIT(push, 2)))
                return ret;
 
-       PUSH_NVSQ(push, NV507D, 0x0880 + (i * 0x400), 0x05000000);
+       PUSH_MTHD(push, NV507D, HEAD_SET_CONTROL_CURSOR(i),
+                 NVDEF(NV507D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) |
+                 NVDEF(NV507D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8) |
+                 NVDEF(NV507D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64));
        return 0;
 }
 
index 0dc04774d3d260760317a39eaeeb138bd070e75d..194d1771c481b3a56ec2a72add4d178b556bb85c 100644 (file)
@@ -36,8 +36,12 @@ head827d_curs_clr(struct nv50_head *head)
        if ((ret = PUSH_WAIT(push, 4)))
                return ret;
 
-       PUSH_NVSQ(push, NV827D, 0x0880 + (i * 0x400), 0x05000000);
-       PUSH_NVSQ(push, NV827D, 0x089c + (i * 0x400), 0x00000000);
+       PUSH_MTHD(push, NV827D, HEAD_SET_CONTROL_CURSOR(i),
+                 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) |
+                 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8) |
+                 NVDEF(NV827D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64));
+
+       PUSH_MTHD(push, NV827D, HEAD_SET_CONTEXT_DMA_CURSOR(i), 0x00000000);
        return 0;
 }
 
index aca4da6c2eeadae4927ef0008287fdc58d3ad86d..3683d940f6cc004334963a9dedb1ba0a52098a2d 100644 (file)
@@ -151,8 +151,12 @@ head907d_curs_clr(struct nv50_head *head)
        if ((ret = PUSH_WAIT(push, 4)))
                return ret;
 
-       PUSH_NVSQ(push, NV907D, 0x0480 + (i * 0x300), 0x05000000);
-       PUSH_NVSQ(push, NV907D, 0x048c + (i * 0x300), 0x00000000);
+       PUSH_MTHD(push, NV907D, HEAD_SET_CONTROL_CURSOR(i),
+                 NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) |
+                 NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8) |
+                 NVDEF(NV907D, HEAD_SET_CONTROL_CURSOR, SIZE, W64_H64));
+
+       PUSH_MTHD(push, NV907D, HEAD_SET_CONTEXT_DMA_CURSOR(i), 0x00000000);
        return 0;
 }
 
index a9ede937222d3f46f3263581cb083968ef241ee0..48b8b4dbd6930774855ec70dcb766a1d9c5aab51 100644 (file)
@@ -101,8 +101,11 @@ headc37d_curs_clr(struct nv50_head *head)
        if ((ret = PUSH_WAIT(push, 4)))
                return ret;
 
-       PUSH_NVSQ(push, NVC37D, 0x209c + (i * 0x400), 0x000000cf);
-       PUSH_NVSQ(push, NVC37D, 0x2088 + (i * 0x400), 0x00000000);
+       PUSH_MTHD(push, NVC37D, HEAD_SET_CONTROL_CURSOR(i),
+                 NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, ENABLE, DISABLE) |
+                 NVDEF(NVC37D, HEAD_SET_CONTROL_CURSOR, FORMAT, A8R8G8B8));
+
+       PUSH_MTHD(push, NVC37D, HEAD_SET_CONTEXT_DMA_CURSOR(i, 0), 0x00000000);
        return 0;
 }