drm/armada: add plane size/location accessors

Add accessors for getting the register values for the plane from the
plane state.  This will allow us to generate the values when validating
the plane rather than when programming, which allows us to fix the
interlace handling without adding lots of additional handling in the
update functions.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>

diff --git a/drivers/gpu/drm/armada/armada_overlay.c b/drivers/gpu/drm/armada/armada_overlay.c
index f830f53d7adfcf84be88d4b4da39afeb1fbd850e..8a3d2815cb58eda34420d4093af42b23cd8f7c98 100644 (file)
--- a/drivers/gpu/drm/armada/armada_overlay.c
+++ b/drivers/gpu/drm/armada/armada_overlay.c
@@ -94,14 +94,14 @@ static void armada_drm_overlay_plane_atomic_update(struct drm_plane *plane,
                armada_reg_queue_mod(regs, idx,
                                     0, CFG_PDWN16x66 | CFG_PDWN32x66,
                                     LCD_SPU_SRAM_PARA1);
-       val = armada_rect_hw_fp(&state->src);
-       if (armada_rect_hw_fp(&old_state->src) != val)
+       val = armada_src_hw(state);
+       if (armada_src_hw(old_state) != val)
                armada_reg_queue_set(regs, idx, val, LCD_SPU_DMA_HPXL_VLN);
-       val = armada_rect_yx(&state->dst);
-       if (armada_rect_yx(&old_state->dst) != val)
+       val = armada_dst_yx(state);
+       if (armada_dst_yx(old_state) != val)
                armada_reg_queue_set(regs, idx, val, LCD_SPU_DMA_OVSA_HPXL_VLN);
-       val = armada_rect_hw(&state->dst);
-       if (armada_rect_hw(&old_state->dst) != val)
+       val = armada_dst_hw(state);
+       if (armada_dst_hw(old_state) != val)
                armada_reg_queue_set(regs, idx, val, LCD_SPU_DZM_HPXL_VLN);
        /* FIXME: overlay on an interlaced display */
        if (old_state->src.x1 != state->src.x1 ||

diff --git a/drivers/gpu/drm/armada/armada_plane.c b/drivers/gpu/drm/armada/armada_plane.c
index 9f36423dd394b11abfe5f42f9a0bc57316ca0353..6c098d379ae21862f954cdc47791b11ffd7c96f3 100644 (file)
--- a/drivers/gpu/drm/armada/armada_plane.c
+++ b/drivers/gpu/drm/armada/armada_plane.c
@@ -173,14 +173,14 @@ static void armada_drm_primary_plane_atomic_update(struct drm_plane *plane,
                        val |= CFG_PDWN256x24;
                armada_reg_queue_mod(regs, idx, 0, val, LCD_SPU_SRAM_PARA1);
        }
-       val = armada_rect_hw_fp(&state->src);
-       if (armada_rect_hw_fp(&old_state->src) != val)
+       val = armada_src_hw(state);
+       if (armada_src_hw(old_state) != val)
                armada_reg_queue_set(regs, idx, val, LCD_SPU_GRA_HPXL_VLN);
-       val = armada_rect_yx(&state->dst);
-       if (armada_rect_yx(&old_state->dst) != val)
+       val = armada_dst_yx(state);
+       if (armada_dst_yx(old_state) != val)
                armada_reg_queue_set(regs, idx, val, LCD_SPU_GRA_OVSA_HPXL_VLN);
-       val = armada_rect_hw(&state->dst);
-       if (armada_rect_hw(&old_state->dst) != val)
+       val = armada_dst_hw(state);
+       if (armada_dst_hw(old_state) != val)
                armada_reg_queue_set(regs, idx, val, LCD_SPU_GZM_HPXL_VLN);
        if (old_state->src.x1 != state->src.x1 ||
            old_state->src.y1 != state->src.y1 ||

diff --git a/drivers/gpu/drm/armada/armada_plane.h b/drivers/gpu/drm/armada/armada_plane.h
index ff4281ba7fad4a8a431f4dabc872aab3235e50b3..049c593342eb28897fa705bbba80ff1240b07879 100644 (file)
--- a/drivers/gpu/drm/armada/armada_plane.h
+++ b/drivers/gpu/drm/armada/armada_plane.h
@@ -1,6 +1,10 @@
 #ifndef ARMADA_PLANE_H
 #define ARMADA_PLANE_H
 
+#define armada_src_hw(state)   armada_rect_hw_fp(&(state)->src)
+#define armada_dst_yx(state)   armada_rect_yx(&(state)->dst)
+#define armada_dst_hw(state)   armada_rect_hw(&(state)->dst)
+
 void armada_drm_plane_calc(struct drm_plane_state *state, u32 addrs[2][3],
        u16 pitches[3], bool interlaced);
 int armada_drm_plane_prepare_fb(struct drm_plane *plane,