Merge tag 'drm-msm-next-2020-09-27' of https://gitlab.freedesktop.org/drm/msm into...

* DSI support for sm8150/sm8250
* Support for per-process GPU pagetables (finally!) for a6xx.
  There are still some iommu/arm-smmu changes required to
  enable, without which it will fallback to the current single
  pgtable state.  The first part (ie. what doesn't depend on
  drm side patches) is queued up for v5.10[1].
* DisplayPort support.  Userspace DP compliance tool support
  is already merged in IGT[2]
* The usual assortment of smaller fixes/cleanups

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGvqjuzH=Po_9EzzFsp2Xq3tqJUTKfsA2g09XY7_+6Ypfw@mail.gmail.com

diff --cc drivers/gpu/drm/i915/display/intel_display.c
Simple merge

diff --cc drivers/gpu/drm/msm/adreno/a5xx_gpu.c
index 91726da82ed67a28634c2044975b0852fc5212b3,c941c8138f257eed721cbae850276479b9ade247..d6804a8023555ac8eed22053445692b1437993db
--- 1/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
--- 2/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a5xx_gpu.c
@@@ -57,9 -67,9 +67,9 @@@ static void a5xx_submit_in_rb(struct ms
                case MSM_SUBMIT_CMD_IB_TARGET_BUF:
                        break;
                case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
-                       if (priv->lastctx == ctx)
+                       if (priv->lastctx == submit->queue->ctx)
                                break;
 -                      /* fall-thru */
 +                      fallthrough;
                case MSM_SUBMIT_CMD_BUF:
                        /* copy commands into RB: */
                        obj = submit->bos[submit->cmd[i].idx].obj;
@@@ -148,9 -157,9 +157,9 @@@ static void a5xx_submit(struct msm_gpu 
                case MSM_SUBMIT_CMD_IB_TARGET_BUF:
                        break;
                case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
-                       if (priv->lastctx == ctx)
+                       if (priv->lastctx == submit->queue->ctx)
                                break;
 -                      /* fall-thru */
 +                      fallthrough;
                case MSM_SUBMIT_CMD_BUF:
                        OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3);
                        OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));

diff --cc drivers/gpu/drm/msm/adreno/a6xx_gmu.c
Simple merge

diff --cc drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index 66a95e22b7b3d523b5dca63bfc12595707b98c4d,8915882e444493d187654f531aaa15a1827abb58..948f3656c20cadbb33597971771eb2f7fd8097cd
--- 1/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
--- 2/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@@ -115,9 -170,9 +170,9 @@@ static void a6xx_submit(struct msm_gpu 
                case MSM_SUBMIT_CMD_IB_TARGET_BUF:
                        break;
                case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
-                       if (priv->lastctx == ctx)
+                       if (priv->lastctx == submit->queue->ctx)
                                break;
 -                      /* fall-thru */
 +                      fallthrough;
                case MSM_SUBMIT_CMD_BUF:
                        OUT_PKT7(ring, CP_INDIRECT_BUFFER_PFE, 3);
                        OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));

diff --cc drivers/gpu/drm/msm/msm_gem.c
index e47958c3704abf823752e84ab7843c3053cf9991,14e14caf90f9849a257e63d43cbc97182551882c..ec602113be78cd5647b02d93f1f95368c78db476
--- 1/drivers/gpu/drm/msm/msm_gem.c
--- 2/drivers/gpu/drm/msm/msm_gem.c
+++ b/drivers/gpu/drm/msm/msm_gem.c
@@@ -52,23 -52,16 +52,14 @@@ static void sync_for_device(struct msm_
  {
        struct device *dev = msm_obj->base.dev->dev;
  
-       if (get_dma_ops(dev) && IS_ENABLED(CONFIG_ARM64)) {
-               dma_sync_sgtable_for_device(dev, msm_obj->sgt,
-                                           DMA_BIDIRECTIONAL);
-       } else {
-               dma_map_sgtable(dev, msm_obj->sgt, DMA_BIDIRECTIONAL, 0);
-       }
 -      dma_map_sg(dev, msm_obj->sgt->sgl,
 -              msm_obj->sgt->nents, DMA_BIDIRECTIONAL);
++      dma_map_sgtable(dev, msm_obj->sgt, DMA_BIDIRECTIONAL, 0);
  }
  
  static void sync_for_cpu(struct msm_gem_object *msm_obj)
  {
        struct device *dev = msm_obj->base.dev->dev;
  
-       if (get_dma_ops(dev) && IS_ENABLED(CONFIG_ARM64)) {
-               dma_sync_sgtable_for_cpu(dev, msm_obj->sgt, DMA_BIDIRECTIONAL);
-       } else {
-               dma_unmap_sgtable(dev, msm_obj->sgt, DMA_BIDIRECTIONAL, 0);
-       }
 -      dma_unmap_sg(dev, msm_obj->sgt->sgl,
 -              msm_obj->sgt->nents, DMA_BIDIRECTIONAL);
++      dma_unmap_sgtable(dev, msm_obj->sgt, DMA_BIDIRECTIONAL, 0);
  }
  
  /* allocate pages from VRAM carveout, used when no IOMMU: */

diff --cc drivers/gpu/drm/msm/msm_gpummu.c
Simple merge

diff --cc drivers/gpu/drm/msm/msm_iommu.c
index 6c31e65834c62e1c0309ea377f348c58ca5e3ffa,697cc0a059d63d3c4042f231454bc16a39433486..3a83ffdb3b90d2985220df7c3b2dcd7622c168e8
--- 1/drivers/gpu/drm/msm/msm_iommu.c
--- 2/drivers/gpu/drm/msm/msm_iommu.c
+++ b/drivers/gpu/drm/msm/msm_iommu.c
@@@ -36,7 -231,11 +231,11 @@@ static int msm_iommu_map(struct msm_mm
        struct msm_iommu *iommu = to_msm_iommu(mmu);
        size_t ret;
  
 -      ret = iommu_map_sg(iommu->domain, iova, sgt->sgl, sgt->nents, prot);
+       /* The arm-smmu driver expects the addresses to be sign extended */
+       if (iova & BIT_ULL(48))
+               iova |= GENMASK_ULL(63, 49);
+ 
 +      ret = iommu_map_sgtable(iommu->domain, iova, sgt, prot);
        WARN_ON(!ret);
  
        return (ret == len) ? 0 : -EINVAL;

diff --cc include/drm/drm_dp_helper.h
Simple merge