projects
/
qemu.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
168aa23
)
target-arm: Implement AArch64 dummy MDSCR_EL1
author
Peter Maydell
<peter.maydell@linaro.org>
Wed, 26 Feb 2014 17:20:03 +0000
(17:20 +0000)
committer
Peter Maydell
<peter.maydell@linaro.org>
Wed, 26 Feb 2014 17:20:03 +0000
(17:20 +0000)
We don't support letting the guest do debug, but Linux prods the
monitor debug system control register anyway, so implement a dummy
RAZ/WI version.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
target-arm/helper.c
patch
|
blob
|
history
diff --git
a/target-arm/helper.c
b/target-arm/helper.c
index 13a55a5970af6b145c20aea0862eda9688ff43d5..75850d6dba106240e4e354ff42ba6bc835c20795 100644
(file)
--- a/
target-arm/helper.c
+++ b/
target-arm/helper.c
@@
-1656,6
+1656,12
@@
static const ARMCPRegInfo v8_cp_reginfo[] = {
.opc0 = 1, .opc2 = 0, .crn = 8, .crm = 7, .opc2 = 7,
.access = PL1_W, .type = ARM_CP_NO_MIGRATE,
.writefn = tlbi_aa64_vaa_write },
+ /* Dummy implementation of monitor debug system control register:
+ * we don't support debug.
+ */
+ { .name = "MDSCR_EL1", .state = ARM_CP_STATE_AA64,
+ .opc0 = 2, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 2,
+ .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
REGINFO_SENTINEL
};