These peripherals are DMA-coherent on 8550. Mark them as such.
Interestingly enough, the I2C master hubs are not.
Fixes: ffc50b2d3828 ("arm64: dts: qcom: Add base SM8550 dtsi")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240210-topic-1v-v1-3-fda0db38e29b@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
                        dma-channels = <12>;
                        dma-channel-mask = <0x3e>;
                        iommus = <&apps_smmu 0x436 0>;
+                       dma-coherent;
                        status = "disabled";
                };
 
                        clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>,
                                 <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>;
                        iommus = <&apps_smmu 0x423 0>;
+                       dma-coherent;
                        #address-cells = <2>;
                        #size-cells = <2>;
                        status = "disabled";
                        dma-channels = <12>;
                        dma-channel-mask = <0x1e>;
                        iommus = <&apps_smmu 0xb6 0>;
+                       dma-coherent;
                        status = "disabled";
                };
 
                        iommus = <&apps_smmu 0xa3 0>;
                        interconnects = <&clk_virt MASTER_QUP_CORE_1 0 &clk_virt SLAVE_QUP_CORE_1 0>;
                        interconnect-names = "qup-core";
+                       dma-coherent;
                        #address-cells = <2>;
                        #size-cells = <2>;
                        status = "disabled";