drm/mediatek: gamma: Make sure relay mode is disabled

Disable relay mode at the end of LUT programming to make sure that the
processed image goes through in both DISP_GAMMA and DISP_AAL for gamma
setting.

Reviewed-by: Jason-JH.Lin <jason-jh.lin@mediatek.com>
Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://patchwork.kernel.org/project/dri-devel/patch/20231012095736.100784-13-angelogioacchino.delregno@collabora.com/
Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_aal.c b/drivers/gpu/drm/mediatek/mtk_disp_aal.c
index 4516eaf577b2aeb2442e7d51c2c9d20b41316ae0..a29651bf566f523e8f3dd7cef48eca7d2da6dea8 100644 (file)
--- a/drivers/gpu/drm/mediatek/mtk_disp_aal.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_aal.c
@@ -18,6 +18,7 @@
 #define DISP_AAL_EN                            0x0000
 #define AAL_EN                                         BIT(0)
 #define DISP_AAL_CFG                           0x0020
+#define AAL_RELAY_MODE                                 BIT(0)
 #define AAL_GAMMA_LUT_EN                               BIT(1)
 #define DISP_AAL_SIZE                          0x0030
 #define DISP_AAL_SIZE_HSIZE                            GENMASK(28, 16)
@@ -119,6 +120,9 @@ void mtk_aal_gamma_set(struct device *dev, struct drm_crtc_state *state)
        /* Enable the gamma table */
        cfg_val |= FIELD_PREP(AAL_GAMMA_LUT_EN, 1);
 
+       /* Disable RELAY mode to pass the processed image */
+       cfg_val &= ~AAL_RELAY_MODE;
+
        writel(cfg_val, aal->regs + DISP_AAL_CFG);
 }
 

diff --git a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
index b4699b4544950e2799b41a73702c443b3f3bf0f5..129b5f9ded99bbee16216f9ddf7c2a2588edac89 100644 (file)
--- a/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_gamma.c
@@ -19,6 +19,7 @@
 #define DISP_GAMMA_EN                          0x0000
 #define GAMMA_EN                                       BIT(0)
 #define DISP_GAMMA_CFG                         0x0020
+#define GAMMA_RELAY_MODE                               BIT(0)
 #define GAMMA_LUT_EN                                   BIT(1)
 #define GAMMA_DITHERING                                        BIT(2)
 #define DISP_GAMMA_SIZE                                0x0030
@@ -175,6 +176,9 @@ void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
        /* Enable the gamma table */
        cfg_val |= FIELD_PREP(GAMMA_LUT_EN, 1);
 
+       /* Disable RELAY mode to pass the processed image */
+       cfg_val &= ~GAMMA_RELAY_MODE;
+
        cfg_val = readl(gamma->regs + DISP_GAMMA_CFG);
 }