drm/amdgpu: add gmc cg support for navy_flounder
authorJiansong Chen <Jiansong.Chen@amd.com>
Mon, 13 Apr 2020 09:26:30 +0000 (17:26 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 15 Jul 2020 16:46:38 +0000 (12:46 -0400)
The athub version used for navy_flounder is v2.1.

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c

index 55fedadd78c63d31a7c330c386f9e1902668a0fa..ec90c62078d96ec21b4a895e5f025ea27f8b1868 100644 (file)
@@ -1125,7 +1125,8 @@ static int gmc_v10_0_set_clockgating_state(void *handle,
        if (r)
                return r;
 
-       if (adev->asic_type == CHIP_SIENNA_CICHLID)
+       if (adev->asic_type == CHIP_SIENNA_CICHLID ||
+           adev->asic_type == CHIP_NAVY_FLOUNDER)
                return athub_v2_1_set_clockgating(adev, state);
        else
                return athub_v2_0_set_clockgating(adev, state);
@@ -1137,7 +1138,8 @@ static void gmc_v10_0_get_clockgating_state(void *handle, u32 *flags)
 
        mmhub_v2_0_get_clockgating(adev, flags);
 
-       if (adev->asic_type == CHIP_SIENNA_CICHLID)
+       if (adev->asic_type == CHIP_SIENNA_CICHLID ||
+           adev->asic_type == CHIP_NAVY_FLOUNDER)
                athub_v2_1_get_clockgating(adev, flags);
        else
                athub_v2_0_get_clockgating(adev, flags);
index 5500f9d8d18fb7a7f57c3b7ae6028a430e38362c..757fa8e83f5b356ce60f441ce874257925e896dd 100644 (file)
@@ -482,6 +482,7 @@ int mmhub_v2_0_set_clockgating(struct amdgpu_device *adev,
        case CHIP_NAVI14:
        case CHIP_NAVI12:
        case CHIP_SIENNA_CICHLID:
+       case CHIP_NAVY_FLOUNDER:
                mmhub_v2_0_update_medium_grain_clock_gating(adev,
                                state == AMD_CG_STATE_GATE);
                mmhub_v2_0_update_medium_grain_light_sleep(adev,