selftests/powerpc/pmu: Add selftest for group constraint check for PMC5 and PMC6

Events using Performance Monitor Counter 5 (PMC5) and Performance
Monitor Counter 6 (PMC6) can't have other fields in event code like
cache bits, thresholding or marked bit. PMC5 and PMC6 only supports base
events: ie 500fa and 600f4. Other combinations should fail. Testcase
tries setting other bits in event code for 500fa and 600f4 to check this
scenario.

Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220610134113.62991-17-atrajeev@linux.vnet.ibm.com

diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
index 6377ae205064ee57ff86572c65ec09b707716034..eb0017233b0bb72b5546c0909985f9e00f29a50c 100644 (file)
--- a/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/Makefile
@@ -1,7 +1,7 @@
 # SPDX-License-Identifier: GPL-2.0
 CFLAGS += -m64
 
-TEST_GEN_PROGS :=
+TEST_GEN_PROGS := group_constraint_pmc56_test
 
 top_srcdir = ../../../../../..
 include ../../../lib.mk

diff --git a/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_pmc56_test.c b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_pmc56_test.c
new file mode 100644 (file)
index 0000000..f5ee479
--- /dev/null
+++ b/tools/testing/selftests/powerpc/pmu/event_code_tests/group_constraint_pmc56_test.c
@@ -0,0 +1,63 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Copyright 2022, Athira Rajeev, IBM Corp.
+ */
+
+#include <stdio.h>
+#include "../event.h"
+#include "../sampling_tests/misc.h"
+
+/*
+ * Testcase for checking constraint checks for
+ * Performance Monitor Counter 5 (PMC5) and also
+ * Performance Monitor Counter 6 (PMC6). Events using
+ * PMC5/PMC6 shouldn't have other fields in event
+ * code like cache bits, thresholding or marked bit.
+ */
+
+static int group_constraint_pmc56(void)
+{
+       struct event event;
+
+       /* Check for platform support for the test */
+       SKIP_IF(platform_check_for_tests());
+
+       /*
+        * Events using PMC5 and PMC6 with cache bit
+        * set in event code is expected to fail.
+        */
+       event_init(&event, 0x2500fa);
+       FAIL_IF(!event_open(&event));
+
+       event_init(&event, 0x2600f4);
+       FAIL_IF(!event_open(&event));
+
+       /*
+        * PMC5 and PMC6 only supports base events:
+        * ie 500fa and 600f4. Other combinations
+        * should fail.
+        */
+       event_init(&event, 0x501e0);
+       FAIL_IF(!event_open(&event));
+
+       event_init(&event, 0x6001e);
+       FAIL_IF(!event_open(&event));
+
+       event_init(&event, 0x501fa);
+       FAIL_IF(!event_open(&event));
+
+       /*
+        * Events using PMC5 and PMC6 with random
+        * sampling bits set in event code should fail
+        * to schedule.
+        */
+       event_init(&event, 0x35340500fa);
+       FAIL_IF(!event_open(&event));
+
+       return 0;
+}
+
+int main(void)
+{
+       return test_harness(group_constraint_pmc56, "group_constraint_pmc56");
+}