dt-bindings: clock: Add D1 CAN bus gates and resets
authorSamuel Holland <samuel@sholland.org>
Sat, 31 Dec 2022 23:14:28 +0000 (17:14 -0600)
committerJernej Skrabec <jernej.skrabec@gmail.com>
Sun, 8 Jan 2023 21:06:10 +0000 (22:06 +0100)
The D1 CCU contains gates and resets for two CAN buses. While the CAN
bus controllers are only documented for the T113 SoC, the CCU is the
same across all SoC variants.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221231231429.18357-6-samuel@sholland.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
include/dt-bindings/clock/sun20i-d1-ccu.h
include/dt-bindings/reset/sun20i-d1-ccu.h

index e3ac53315e1a5b3d4dd670e9d3f5629b375de5f6..e143b9929763a12024034e6c9184c42967bade17 100644 (file)
 #define CLK_FANOUT0            142
 #define CLK_FANOUT1            143
 #define CLK_FANOUT2            144
+#define CLK_BUS_CAN0           145
+#define CLK_BUS_CAN1           146
 
 #endif /* _DT_BINDINGS_CLK_SUN20I_D1_CCU_H_ */
index de9ff5203239cfbb5030d2391c2aad6acf804527..f8001cf50bf178d5405fca14703a8fdca56b4376 100644 (file)
@@ -73,5 +73,7 @@
 #define RST_BUS_DSP_CFG                63
 #define RST_BUS_DSP_DBG                64
 #define RST_BUS_RISCV_CFG      65
+#define RST_BUS_CAN0           66
+#define RST_BUS_CAN1           67
 
 #endif /* _DT_BINDINGS_RST_SUN20I_D1_CCU_H_ */