arm64: dts: lx2160a: Add flexcan support

LX2160A supports two flexcan controllers. Add the support.
Enable support further for LX2160A-RDB/QDS.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
index 16ae3b00cf480affa0e1878ea7cc90e9aeb5dc2c..d858d9c8b583def45d6f67d453f601274b477be5 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts
@@ -33,6 +33,14 @@
        };
 };
 
+&can0 {
+       status = "okay";
+};
+
+&can1 {
+       status = "okay";
+};
+
 &crypto {
        status = "okay";
 };

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
index 6f82759f0ce44f0e9f65196f4d5fe3e3965cf768..5dbf27493e8b282ee4920a8cd9790b72ef9e9ce1 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts
@@ -89,6 +89,22 @@
        };
 };
 
+&can0 {
+       status = "okay";
+
+       can-transceiver {
+               max-bitrate = <5000000>;
+       };
+};
+
+&can1 {
+       status = "okay";
+
+       can-transceiver {
+               max-bitrate = <5000000>;
+       };
+};
+
 &esdhc0 {
        sd-uhs-sdr104;
        sd-uhs-sdr50;

diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
index 451e4430024cdd199e4d103c500649e53b17edf9..0551f6f4c313cb8ba834ca6ea32efbcdd10ba914 100644 (file)
--- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
@@ -895,6 +895,30 @@
                        status = "disabled";
                };
 
+               can0: can@2180000 {
+                       compatible = "fsl,lx2160ar1-flexcan";
+                       reg = <0x0 0x2180000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(8)>,
+                                <&clockgen QORIQ_CLK_SYSCLK 0>;
+                       clock-names = "ipg", "per";
+                       fsl,clk-source = <0>;
+                       status = "disabled";
+               };
+
+               can1: can@2190000 {
+                       compatible = "fsl,lx2160ar1-flexcan";
+                       reg = <0x0 0x2190000 0x0 0x10000>;
+                       interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(8)>,
+                                <&clockgen QORIQ_CLK_SYSCLK 0>;
+                       clock-names = "ipg", "per";
+                       fsl,clk-source = <0>;
+                       status = "disabled";
+               };
+
                uart0: serial@21c0000 {
                        compatible = "arm,sbsa-uart","arm,pl011";
                        reg = <0x0 0x21c0000 0x0 0x1000>;