arm64: dts: rockchip: Fix GPU register width for RK3328

As can be seen in RK3328's TRM the register range for the GPU is
0xff300000 to 0xff330000.
It would (and does in vendor kernel) overlap with the registers of
the HEVC encoder (node/driver do not exist yet in upstream kernel).
See already existing h265e_mmu node.

Fixes: 752fbc0c8da7 ("arm64: dts: rockchip: add rk3328 mali gpu node")
Signed-off-by: Alex Bee <knaerzche@gmail.com>
Link: https://lore.kernel.org/r/20210623115926.164861-1-knaerzche@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
index becc1c61b182881125f09a1fbb491684638e8111..5b2020590f5305cf81667b56e24056eae2250d87 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi
@@ -599,7 +599,7 @@
 
        gpu: gpu@ff300000 {
                compatible = "rockchip,rk3328-mali", "arm,mali-450";
-               reg = <0x0 0xff300000 0x0 0x40000>;
+               reg = <0x0 0xff300000 0x0 0x30000>;
                interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
                             <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>,