qusb2_setbits(qphy->base, QUSB2PHY_PORT_TUNE2, val[0] << 0x4);
 }
 
-static int qusb2_phy_poweron(struct phy *phy)
+static int qusb2_phy_init(struct phy *phy)
 {
        struct qusb2_phy *qphy = phy_get_drvdata(phy);
-       int num = ARRAY_SIZE(qphy->vregs);
+       unsigned int val;
+       unsigned int clk_scheme;
        int ret;
 
-       dev_vdbg(&phy->dev, "%s(): Powering-on QUSB2 phy\n", __func__);
+       dev_vdbg(&phy->dev, "%s(): Initializing QUSB2 phy\n", __func__);
 
        /* turn on regulator supplies */
-       ret = regulator_bulk_enable(num, qphy->vregs);
+       ret = regulator_bulk_enable(ARRAY_SIZE(qphy->vregs), qphy->vregs);
        if (ret)
                return ret;
 
        ret = clk_prepare_enable(qphy->iface_clk);
        if (ret) {
                dev_err(&phy->dev, "failed to enable iface_clk, %d\n", ret);
-               regulator_bulk_disable(num, qphy->vregs);
-               return ret;
+               goto poweroff_phy;
        }
 
-       return 0;
-}
-
-static int qusb2_phy_poweroff(struct phy *phy)
-{
-       struct qusb2_phy *qphy = phy_get_drvdata(phy);
-
-       clk_disable_unprepare(qphy->iface_clk);
-
-       regulator_bulk_disable(ARRAY_SIZE(qphy->vregs), qphy->vregs);
-
-       return 0;
-}
-
-static int qusb2_phy_init(struct phy *phy)
-{
-       struct qusb2_phy *qphy = phy_get_drvdata(phy);
-       unsigned int val;
-       unsigned int clk_scheme;
-       int ret;
-
-       dev_vdbg(&phy->dev, "%s(): Initializing QUSB2 phy\n", __func__);
-
        /* enable ahb interface clock to program phy */
        ret = clk_prepare_enable(qphy->cfg_ahb_clk);
        if (ret) {
                dev_err(&phy->dev, "failed to enable cfg ahb clock, %d\n", ret);
-               return ret;
+               goto disable_iface_clk;
        }
 
        /* Perform phy reset */
        reset_control_assert(qphy->phy_reset);
 disable_ahb_clk:
        clk_disable_unprepare(qphy->cfg_ahb_clk);
+disable_iface_clk:
+       clk_disable_unprepare(qphy->iface_clk);
+poweroff_phy:
+       regulator_bulk_disable(ARRAY_SIZE(qphy->vregs), qphy->vregs);
+
        return ret;
 }
 
        reset_control_assert(qphy->phy_reset);
 
        clk_disable_unprepare(qphy->cfg_ahb_clk);
+       clk_disable_unprepare(qphy->iface_clk);
+
+       regulator_bulk_disable(ARRAY_SIZE(qphy->vregs), qphy->vregs);
 
        return 0;
 }
 static const struct phy_ops qusb2_phy_gen_ops = {
        .init           = qusb2_phy_init,
        .exit           = qusb2_phy_exit,
-       .power_on       = qusb2_phy_poweron,
-       .power_off      = qusb2_phy_poweroff,
        .owner          = THIS_MODULE,
 };