ARM: dts: sun8i: v3s: Provide default muxing for relevant controllers

The MMC0 controllers have only one muxing option in the SoC. In such a
case, we can just move the muxing into the DTSI, and remove it from
the DTS.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>

diff --git a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
index 333df90e8037cd511b5159dc7587e1102ed67a56..99c8cf7bb86cce8863bc5aba669609bc03c07824 100644 (file)
--- a/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
+++ b/arch/arm/boot/dts/sun8i-v3s-licheepi-zero.dts
@@ -78,8 +78,6 @@
 };
 
 &mmc0 {
-       pinctrl-0 = <&mmc0_pins>;
-       pinctrl-names = "default";
        broken-cd;
        bus-width = <4>;
        vmmc-supply = <&reg_vcc3v3>;

diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 92fcb756a08a9b605d5f63365f93fe61df1434fe..21e1806ca509d1801182922fcba76b93c44bdf0a 100644 (file)
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -192,6 +192,8 @@
                        resets = <&ccu RST_BUS_MMC0>;
                        reset-names = "ahb";
                        interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&mmc0_pins>;
                        status = "disabled";
                        #address-cells = <1>;
                        #size-cells = <0>;