staging: r8188eu: PHY_SetRFPathSwitch_8188E is not used
authorMartin Kaiser <martin@kaiser.cx>
Sat, 16 Oct 2021 11:30:05 +0000 (13:30 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 18 Oct 2021 14:40:15 +0000 (16:40 +0200)
Remove the PHY_SetRFPathSwitch_8188E function which is not used.

It was the only caller of phy_setrfpathswitch_8188e, that function
can be removed as well.

Acked-by: Michael Straube <straube.linux@gmail.com>
Acked-by: Phillip Potter <phil@philpotter.co.uk>
Signed-off-by: Martin Kaiser <martin@kaiser.cx>
Link: https://lore.kernel.org/r/20211016113008.27549-6-martin@kaiser.cx
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/r8188eu/hal/HalPhyRf_8188e.c
drivers/staging/r8188eu/include/Hal8188EPhyCfg.h

index 8e9fbc9cf84d1179013986b4e078a12505a3ad7e..9fcee29b42b8909ef39a32df6ddc78a86012ee8a 100644 (file)
@@ -1189,41 +1189,3 @@ void PHY_LCCalibrate_8188E(struct adapter *adapt)
                phy_LCCalibrate_8188E(adapt, false);
        }
 }
-
-static void phy_setrfpathswitch_8188e(struct adapter *adapt, bool main, bool is2t)
-{
-       struct hal_data_8188e   *pHalData = GET_HAL_DATA(adapt);
-       struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
-
-       if (!adapt->hw_init_completed) {
-               u8 u1btmp;
-               u1btmp = ODM_Read1Byte(dm_odm, REG_LEDCFG2) | BIT(7);
-               ODM_Write1Byte(dm_odm, REG_LEDCFG2, u1btmp);
-               ODM_SetBBReg(dm_odm, rFPGA0_XAB_RFParameter, BIT(13), 0x01);
-       }
-
-       if (is2t) {     /* 92C */
-               if (main)
-                       ODM_SetBBReg(dm_odm, rFPGA0_XB_RFInterfaceOE, BIT(5) | BIT(6), 0x1);    /* 92C_Path_A */
-               else
-                       ODM_SetBBReg(dm_odm, rFPGA0_XB_RFInterfaceOE, BIT(5) | BIT(6), 0x2);    /* BT */
-       } else {                        /* 88C */
-               if (main)
-                       ODM_SetBBReg(dm_odm, rFPGA0_XA_RFInterfaceOE, BIT(8) | BIT(9), 0x2);    /* Main */
-               else
-                       ODM_SetBBReg(dm_odm, rFPGA0_XA_RFInterfaceOE, BIT(8) | BIT(9), 0x1);    /* Aux */
-       }
-}
-
-void PHY_SetRFPathSwitch_8188E(struct adapter *adapt, bool main)
-{
-       struct hal_data_8188e   *pHalData = GET_HAL_DATA(adapt);
-       struct odm_dm_struct *dm_odm = &pHalData->odmpriv;
-
-       if (dm_odm->RFType == ODM_2T2R) {
-               phy_setrfpathswitch_8188e(adapt, main, true);
-       } else {
-               /*  For 88C 1T1R */
-               phy_setrfpathswitch_8188e(adapt, main, false);
-       }
-}
index 084bccc5dcb98a104264df1534478d90e987fad0..feae0b32cac66d0e961777be083538465663ae08 100644 (file)
@@ -195,9 +195,6 @@ void PHY_SetBWMode8188E(struct adapter *adapter,
 /*  channel switch related funciton */
 void PHY_SwChnl8188E(struct adapter *adapter, u8 channel);
 
-/*  BB/MAC/RF other monitor API */
-void PHY_SetRFPathSwitch_8188E(struct adapter *adapter,        bool main);
-
 void storePwrIndexDiffRateOffset(struct adapter *adapter, u32 regaddr,
                                 u32 mask, u32 data);
 /*--------------------------Exported Function prototype---------------------*/