crypto: qat - rename and relocate GEN2 config function

Rename qat_crypto_dev_config() in adf_gen2_dev_config() and relocate it
to the newly created file adf_gen2_config.c.
This function is specific to QAT GEN2 devices and will be used also to
configure the compression service.

In addition change the drivers to use the dev_config() in the hardware
data structure (which for GEN2 devices now points to
adf_gen2_dev_config()), for consistency.

Signed-off-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Wojciech Ziemba <wojciech.ziemba@intel.com>
Reviewed-by: Adam Guerin <adam.guerin@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

diff --git a/drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c b/drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c
index 50d5afa26a9bee75155345bacb39b9899015bcb2..c0519a79060a9ac954cdce27015b3b8496262c4e 100644 (file)
--- a/drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c
+++ b/drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c
@@ -2,6 +2,7 @@
 /* Copyright(c) 2014 - 2021 Intel Corporation */
 #include <adf_accel_devices.h>
 #include <adf_common_drv.h>
+#include <adf_gen2_config.h>
 #include <adf_gen2_hw_data.h>
 #include <adf_gen2_pfvf.h>
 #include "adf_c3xxx_hw_data.h"
@@ -124,6 +125,7 @@ void adf_init_hw_data_c3xxx(struct adf_hw_device_data *hw_data)
        hw_data->reset_device = adf_reset_flr;
        hw_data->set_ssm_wdtimer = adf_gen2_set_ssm_wdtimer;
        hw_data->disable_iov = adf_disable_sriov;
+       hw_data->dev_config = adf_gen2_dev_config;
 
        adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops);
        adf_gen2_init_hw_csr_ops(&hw_data->csr_ops);

diff --git a/drivers/crypto/qat/qat_c3xxx/adf_drv.c b/drivers/crypto/qat/qat_c3xxx/adf_drv.c
index 2aef0bb791dfa3f39867662c55210bd47c96ec6e..1f4fbf4562b221b7a846293199fb08608fb2911f 100644 (file)
--- a/drivers/crypto/qat/qat_c3xxx/adf_drv.c
+++ b/drivers/crypto/qat/qat_c3xxx/adf_drv.c
@@ -201,7 +201,7 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                goto out_err_disable_aer;
        }
 
-       ret = qat_crypto_dev_config(accel_dev);
+       ret = hw_data->dev_config(accel_dev);
        if (ret)
                goto out_err_disable_aer;
 

diff --git a/drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c b/drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c
index a9fbe57b32ae35631a205604d3796604388a9ace..6c37dda6da2ee71ae69d65a8012b003718519ea7 100644 (file)
--- a/drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c
+++ b/drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c
@@ -2,6 +2,7 @@
 /* Copyright(c) 2015 - 2021 Intel Corporation */
 #include <adf_accel_devices.h>
 #include <adf_common_drv.h>
+#include <adf_gen2_config.h>
 #include <adf_gen2_hw_data.h>
 #include <adf_gen2_pfvf.h>
 #include <adf_pfvf_vf_msg.h>
@@ -86,6 +87,7 @@ void adf_init_hw_data_c3xxxiov(struct adf_hw_device_data *hw_data)
        hw_data->get_sku = get_sku;
        hw_data->enable_ints = adf_vf_void_noop;
        hw_data->dev_class->instances++;
+       hw_data->dev_config = adf_gen2_dev_config;
        adf_devmgr_update_class_index(hw_data);
        adf_gen2_init_vf_pfvf_ops(&hw_data->pfvf_ops);
        adf_gen2_init_hw_csr_ops(&hw_data->csr_ops);

diff --git a/drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c b/drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c
index c00386fe6587a684f56dea91da0c1260e3e7a134..689358cb7bb08e2b1c3b6eeffa8738839446e545 100644 (file)
--- a/drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c
+++ b/drivers/crypto/qat/qat_c62x/adf_c62x_hw_data.c
@@ -2,6 +2,7 @@
 /* Copyright(c) 2014 - 2021 Intel Corporation */
 #include <adf_accel_devices.h>
 #include <adf_common_drv.h>
+#include <adf_gen2_config.h>
 #include <adf_gen2_hw_data.h>
 #include <adf_gen2_pfvf.h>
 #include "adf_c62x_hw_data.h"
@@ -126,6 +127,7 @@ void adf_init_hw_data_c62x(struct adf_hw_device_data *hw_data)
        hw_data->reset_device = adf_reset_flr;
        hw_data->set_ssm_wdtimer = adf_gen2_set_ssm_wdtimer;
        hw_data->disable_iov = adf_disable_sriov;
+       hw_data->dev_config = adf_gen2_dev_config;
 
        adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops);
        adf_gen2_init_hw_csr_ops(&hw_data->csr_ops);

diff --git a/drivers/crypto/qat/qat_c62x/adf_drv.c b/drivers/crypto/qat/qat_c62x/adf_drv.c
index 56163083f16163c878f02cf1859982492426a325..4ccaf298250c3c6286195381ba8d144c140d66e8 100644 (file)
--- a/drivers/crypto/qat/qat_c62x/adf_drv.c
+++ b/drivers/crypto/qat/qat_c62x/adf_drv.c
@@ -201,7 +201,7 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                goto out_err_disable_aer;
        }
 
-       ret = qat_crypto_dev_config(accel_dev);
+       ret = hw_data->dev_config(accel_dev);
        if (ret)
                goto out_err_disable_aer;
 

diff --git a/drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c b/drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c
index 0282038fca54893c93387007a0d24f83a63de912..521110ecd07fd492126a5d40dcc70dc94dc010a0 100644 (file)
--- a/drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c
+++ b/drivers/crypto/qat/qat_c62xvf/adf_c62xvf_hw_data.c
@@ -2,6 +2,7 @@
 /* Copyright(c) 2015 - 2021 Intel Corporation */
 #include <adf_accel_devices.h>
 #include <adf_common_drv.h>
+#include <adf_gen2_config.h>
 #include <adf_gen2_hw_data.h>
 #include <adf_gen2_pfvf.h>
 #include <adf_pfvf_vf_msg.h>
@@ -86,6 +87,7 @@ void adf_init_hw_data_c62xiov(struct adf_hw_device_data *hw_data)
        hw_data->get_sku = get_sku;
        hw_data->enable_ints = adf_vf_void_noop;
        hw_data->dev_class->instances++;
+       hw_data->dev_config = adf_gen2_dev_config;
        adf_devmgr_update_class_index(hw_data);
        adf_gen2_init_vf_pfvf_ops(&hw_data->pfvf_ops);
        adf_gen2_init_hw_csr_ops(&hw_data->csr_ops);

diff --git a/drivers/crypto/qat/qat_common/Makefile b/drivers/crypto/qat/qat_common/Makefile
index b0587d03eac292cdf780215fc5ecf6ed17149118..b59b6315134b604d5726b1edd3146898dd4b52ce 100644 (file)
--- a/drivers/crypto/qat/qat_common/Makefile
+++ b/drivers/crypto/qat/qat_common/Makefile
@@ -12,6 +12,7 @@ intel_qat-objs := adf_cfg.o \
        adf_hw_arbiter.o \
        adf_sysfs.o \
        adf_gen2_hw_data.o \
+       adf_gen2_config.o \
        adf_gen4_hw_data.o \
        adf_gen4_pm.o \
        qat_crypto.o \

diff --git a/drivers/crypto/qat/qat_common/adf_common_drv.h b/drivers/crypto/qat/qat_common/adf_common_drv.h
index 7bb477c3ce25ff9c9ca1c151d67f50ea2874509f..b8ec0268d2d291cf617c391e18e7b8192d04690d 100644 (file)
--- a/drivers/crypto/qat/qat_common/adf_common_drv.h
+++ b/drivers/crypto/qat/qat_common/adf_common_drv.h
@@ -110,7 +110,6 @@ int adf_init_etr_data(struct adf_accel_dev *accel_dev);
 void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev);
 int qat_crypto_register(void);
 int qat_crypto_unregister(void);
-int qat_crypto_dev_config(struct adf_accel_dev *accel_dev);
 int qat_crypto_vf_dev_config(struct adf_accel_dev *accel_dev);
 struct qat_crypto_instance *qat_crypto_get_instance_node(int node);
 void qat_crypto_put_instance(struct qat_crypto_instance *inst);

diff --git a/drivers/crypto/qat/qat_common/adf_gen2_config.c b/drivers/crypto/qat/qat_common/adf_gen2_config.c
new file mode 100644 (file)
index 0000000..1c490e1
--- /dev/null
+++ b/drivers/crypto/qat/qat_common/adf_gen2_config.c
@@ -0,0 +1,131 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/* Copyright(c) 2022 Intel Corporation */
+#include "adf_accel_devices.h"
+#include "adf_cfg.h"
+#include "adf_cfg_strings.h"
+#include "adf_gen2_config.h"
+#include "adf_common_drv.h"
+#include "qat_crypto.h"
+#include "adf_transport_access_macros.h"
+
+static int adf_gen2_crypto_dev_config(struct adf_accel_dev *accel_dev)
+{
+       char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES];
+       int banks = GET_MAX_BANKS(accel_dev);
+       int cpus = num_online_cpus();
+       unsigned long val;
+       int instances;
+       int ret;
+       int i;
+
+       if (adf_hw_dev_has_crypto(accel_dev))
+               instances = min(cpus, banks);
+       else
+               instances = 0;
+
+       ret = adf_cfg_section_add(accel_dev, ADF_KERNEL_SEC);
+       if (ret)
+               goto err;
+
+       ret = adf_cfg_section_add(accel_dev, "Accelerator0");
+       if (ret)
+               goto err;
+
+       for (i = 0; i < instances; i++) {
+               val = i;
+               snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_BANK_NUM, i);
+               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
+                                                 key, &val, ADF_DEC);
+               if (ret)
+                       goto err;
+
+               snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_BANK_NUM, i);
+               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
+                                                 key, &val, ADF_DEC);
+               if (ret)
+                       goto err;
+
+               snprintf(key, sizeof(key), ADF_CY "%d" ADF_ETRMGR_CORE_AFFINITY,
+                        i);
+               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
+                                                 key, &val, ADF_DEC);
+               if (ret)
+                       goto err;
+
+               snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_SIZE, i);
+               val = 128;
+               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
+                                                 key, &val, ADF_DEC);
+               if (ret)
+                       goto err;
+
+               val = 512;
+               snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_SIZE, i);
+               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
+                                                 key, &val, ADF_DEC);
+               if (ret)
+                       goto err;
+
+               val = 0;
+               snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_TX, i);
+               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
+                                                 key, &val, ADF_DEC);
+               if (ret)
+                       goto err;
+
+               val = 2;
+               snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_TX, i);
+               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
+                                                 key, &val, ADF_DEC);
+               if (ret)
+                       goto err;
+
+               val = 8;
+               snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_RX, i);
+               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
+                                                 key, &val, ADF_DEC);
+               if (ret)
+                       goto err;
+
+               val = 10;
+               snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_RX, i);
+               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
+                                                 key, &val, ADF_DEC);
+               if (ret)
+                       goto err;
+
+               val = ADF_COALESCING_DEF_TIME;
+               snprintf(key, sizeof(key), ADF_ETRMGR_COALESCE_TIMER_FORMAT, i);
+               ret = adf_cfg_add_key_value_param(accel_dev, "Accelerator0",
+                                                 key, &val, ADF_DEC);
+               if (ret)
+                       goto err;
+       }
+
+       val = i;
+       ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_CY,
+                                         &val, ADF_DEC);
+       if (ret)
+               goto err;
+
+       set_bit(ADF_STATUS_CONFIGURED, &accel_dev->status);
+       return 0;
+err:
+       dev_err(&GET_DEV(accel_dev), "Failed to start QAT accel dev\n");
+       return ret;
+}
+
+/**
+ * adf_gen2_dev_config() - create dev config required to create instances
+ *
+ * @accel_dev: Pointer to acceleration device.
+ *
+ * Function creates device configuration required to create instances
+ *
+ * Return: 0 on success, error code otherwise.
+ */
+int adf_gen2_dev_config(struct adf_accel_dev *accel_dev)
+{
+       return adf_gen2_crypto_dev_config(accel_dev);
+}
+EXPORT_SYMBOL_GPL(adf_gen2_dev_config);

diff --git a/drivers/crypto/qat/qat_common/adf_gen2_config.h b/drivers/crypto/qat/qat_common/adf_gen2_config.h
new file mode 100644 (file)
index 0000000..4bf9da2
--- /dev/null
+++ b/drivers/crypto/qat/qat_common/adf_gen2_config.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* Copyright(c) 2022 Intel Corporation */
+#ifndef ADF_GEN2_CONFIG_H_
+#define ADF_GEN2_CONFIG_H_
+
+#include "adf_accel_devices.h"
+
+int adf_gen2_dev_config(struct adf_accel_dev *accel_dev);
+
+#endif

diff --git a/drivers/crypto/qat/qat_common/qat_crypto.c b/drivers/crypto/qat/qat_common/qat_crypto.c
index 9341d892533a7ebc57a23a1a0461ec126890dc65..e31199eade5b6f97587e59d99f0b2debd664b9fd 100644 (file)
--- a/drivers/crypto/qat/qat_common/qat_crypto.c
+++ b/drivers/crypto/qat/qat_common/qat_crypto.c
@@ -5,7 +5,6 @@
 #include "adf_accel_devices.h"
 #include "adf_common_drv.h"
 #include "adf_transport.h"
-#include "adf_transport_access_macros.h"
 #include "adf_cfg.h"
 #include "adf_cfg_strings.h"
 #include "adf_gen2_hw_data.h"
@@ -126,126 +125,9 @@ int qat_crypto_vf_dev_config(struct adf_accel_dev *accel_dev)
                return -EFAULT;
        }
 
-       return qat_crypto_dev_config(accel_dev);
+       return GET_HW_DATA(accel_dev)->dev_config(accel_dev);
 }
 
-/**
- * qat_crypto_dev_config() - create dev config required to create crypto inst.
- *
- * @accel_dev: Pointer to acceleration device.
- *
- * Function creates device configuration required to create crypto instances
- *
- * Return: 0 on success, error code otherwise.
- */
-int qat_crypto_dev_config(struct adf_accel_dev *accel_dev)
-{
-       char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES];
-       int banks = GET_MAX_BANKS(accel_dev);
-       int cpus = num_online_cpus();
-       unsigned long val;
-       int instances;
-       int ret;
-       int i;
-
-       if (adf_hw_dev_has_crypto(accel_dev))
-               instances = min(cpus, banks);
-       else
-               instances = 0;
-
-       ret = adf_cfg_section_add(accel_dev, ADF_KERNEL_SEC);
-       if (ret)
-               goto err;
-
-       ret = adf_cfg_section_add(accel_dev, "Accelerator0");
-       if (ret)
-               goto err;
-
-       for (i = 0; i < instances; i++) {
-               val = i;
-               snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_BANK_NUM, i);
-               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
-                                                 key, &val, ADF_DEC);
-               if (ret)
-                       goto err;
-
-               snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_BANK_NUM, i);
-               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
-                                                 key, &val, ADF_DEC);
-               if (ret)
-                       goto err;
-
-               snprintf(key, sizeof(key), ADF_CY "%d" ADF_ETRMGR_CORE_AFFINITY,
-                        i);
-               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
-                                                 key, &val, ADF_DEC);
-               if (ret)
-                       goto err;
-
-               snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_SIZE, i);
-               val = 128;
-               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
-                                                 key, &val, ADF_DEC);
-               if (ret)
-                       goto err;
-
-               val = 512;
-               snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_SIZE, i);
-               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
-                                                 key, &val, ADF_DEC);
-               if (ret)
-                       goto err;
-
-               val = 0;
-               snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_TX, i);
-               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
-                                                 key, &val, ADF_DEC);
-               if (ret)
-                       goto err;
-
-               val = 2;
-               snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_TX, i);
-               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
-                                                 key, &val, ADF_DEC);
-               if (ret)
-                       goto err;
-
-               val = 8;
-               snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_RX, i);
-               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
-                                                 key, &val, ADF_DEC);
-               if (ret)
-                       goto err;
-
-               val = 10;
-               snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_RX, i);
-               ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
-                                                 key, &val, ADF_DEC);
-               if (ret)
-                       goto err;
-
-               val = ADF_COALESCING_DEF_TIME;
-               snprintf(key, sizeof(key), ADF_ETRMGR_COALESCE_TIMER_FORMAT, i);
-               ret = adf_cfg_add_key_value_param(accel_dev, "Accelerator0",
-                                                 key, &val, ADF_DEC);
-               if (ret)
-                       goto err;
-       }
-
-       val = i;
-       ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_CY,
-                                         &val, ADF_DEC);
-       if (ret)
-               goto err;
-
-       set_bit(ADF_STATUS_CONFIGURED, &accel_dev->status);
-       return 0;
-err:
-       dev_err(&GET_DEV(accel_dev), "Failed to start QAT accel dev\n");
-       return ret;
-}
-EXPORT_SYMBOL_GPL(qat_crypto_dev_config);
-
 static int qat_crypto_create_instances(struct adf_accel_dev *accel_dev)
 {
        unsigned long num_inst, num_msg_sym, num_msg_asym;

diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
index cb3bdd3618fb0e72701d7dc87272462a8a75a587..baacf817abf6811ee7230cad3592501992f4cfff 100644 (file)
--- a/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
+++ b/drivers/crypto/qat/qat_dh895xcc/adf_dh895xcc_hw_data.c
@@ -2,6 +2,7 @@
 /* Copyright(c) 2014 - 2021 Intel Corporation */
 #include <adf_accel_devices.h>
 #include <adf_common_drv.h>
+#include <adf_gen2_config.h>
 #include <adf_gen2_hw_data.h>
 #include <adf_gen2_pfvf.h>
 #include "adf_dh895xcc_hw_data.h"
@@ -234,6 +235,7 @@ void adf_init_hw_data_dh895xcc(struct adf_hw_device_data *hw_data)
        hw_data->enable_ints = adf_gen2_enable_ints;
        hw_data->reset_device = adf_reset_sbr;
        hw_data->disable_iov = adf_disable_sriov;
+       hw_data->dev_config = adf_gen2_dev_config;
 
        adf_gen2_init_pf_pfvf_ops(&hw_data->pfvf_ops);
        hw_data->pfvf_ops.enable_vf2pf_interrupts = enable_vf2pf_interrupts;

diff --git a/drivers/crypto/qat/qat_dh895xcc/adf_drv.c b/drivers/crypto/qat/qat_dh895xcc/adf_drv.c
index acca56752aa02dec61fcc901ace74edecdf63c32..ebeb17b67fcd58d89f7ab569ab4491f23faf8e99 100644 (file)
--- a/drivers/crypto/qat/qat_dh895xcc/adf_drv.c
+++ b/drivers/crypto/qat/qat_dh895xcc/adf_drv.c
@@ -201,7 +201,7 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                goto out_err_disable_aer;
        }
 
-       ret = qat_crypto_dev_config(accel_dev);
+       ret = hw_data->dev_config(accel_dev);
        if (ret)
                goto out_err_disable_aer;
 

diff --git a/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c b/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c
index 31c14d7e1c115d00414388df60ab6a8605ba1e09..b933a00fb91b815eb1248c0ffba655e0ae71ea89 100644 (file)
--- a/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c
+++ b/drivers/crypto/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c
@@ -2,6 +2,7 @@
 /* Copyright(c) 2015 - 2021 Intel Corporation */
 #include <adf_accel_devices.h>
 #include <adf_common_drv.h>
+#include <adf_gen2_config.h>
 #include <adf_gen2_hw_data.h>
 #include <adf_gen2_pfvf.h>
 #include <adf_pfvf_vf_msg.h>
@@ -86,6 +87,7 @@ void adf_init_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data)
        hw_data->get_sku = get_sku;
        hw_data->enable_ints = adf_vf_void_noop;
        hw_data->dev_class->instances++;
+       hw_data->dev_config = adf_gen2_dev_config;
        adf_devmgr_update_class_index(hw_data);
        adf_gen2_init_vf_pfvf_ops(&hw_data->pfvf_ops);
        adf_gen2_init_hw_csr_ops(&hw_data->csr_ops);