arm64: dts: qcom: sdm845: Reserve LPASS clocks in gcc
authorBjorn Andersson <bjorn.andersson@linaro.org>
Tue, 22 Dec 2020 00:11:03 +0000 (16:11 -0800)
committerBjorn Andersson <bjorn.andersson@linaro.org>
Wed, 13 Jan 2021 06:20:13 +0000 (00:20 -0600)
The GCC_LPASS_Q6_AXI_CLK and GCC_LPASS_SWAY_CLK clocks may not be
touched on a typical UEFI based SDM845 device, but when the kernel is
built with CONFIG_SDM_LPASSCC_845 this happens, unless they are marked
as protected-clocks in the DT.

This was done for the MTP and the Pocophone, but not for DB845c and the
Lenovo Yoga C630 - causing these to fail to boot if the LPASS clock
controller is enabled (which it typically isn't).

Tested-by: Vinod Koul <vkoul@kernel.org> #on db845c
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20201222001103.3112306-1-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
arch/arm64/boot/dts/qcom/sdm845-db845c.dts
arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts

index 7cc236575ee203e58622f622fd4d85dc9b39a21b..c0b93813ea9acd42f66f9fa173b99ae9ae8b722d 100644 (file)
 &gcc {
        protected-clocks = <GCC_QSPI_CORE_CLK>,
                           <GCC_QSPI_CORE_CLK_SRC>,
-                          <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
+                          <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
+                          <GCC_LPASS_Q6_AXI_CLK>,
+                          <GCC_LPASS_SWAY_CLK>;
 };
 
 &gpu {
index 3be85161a54e3a3bb2d7f57d394c98c0184eda18..8b40f96e978025168752bcea8a1000e8944be647 100644 (file)
 &gcc {
        protected-clocks = <GCC_QSPI_CORE_CLK>,
                           <GCC_QSPI_CORE_CLK_SRC>,
-                          <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
+                          <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
+                          <GCC_LPASS_Q6_AXI_CLK>,
+                          <GCC_LPASS_SWAY_CLK>;
 };
 
 &gpu {